| V1 |
|
100.00% |
| V2 |
|
91.97% |
| V2S |
|
98.49% |
| V3 |
|
70.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 59.210s | 4180.053us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_hw_reset | 10.800s | 463.617us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_csr_rw | 11.870s | 258.716us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| alert_handler_csr_bit_bash | 370.820s | 11421.787us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| alert_handler_csr_aliasing | 208.160s | 40624.866us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 13.020s | 759.258us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| alert_handler_csr_rw | 11.870s | 258.716us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 208.160s | 40624.866us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 50 | 50 | 100.00 | |||
| alert_handler_esc_alert_accum | 279.720s | 20996.496us | 50 | 50 | 100.00 | |
| esc_timeout | 50 | 50 | 100.00 | |||
| alert_handler_esc_intr_timeout | 68.450s | 1164.099us | 50 | 50 | 100.00 | |
| entropy | 49 | 50 | 98.00 | |||
| alert_handler_entropy | 2709.450s | 129100.362us | 49 | 50 | 98.00 | |
| sig_int_fail | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 55.630s | 1072.484us | 49 | 50 | 98.00 | |
| clk_skew | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 59.210s | 4180.053us | 50 | 50 | 100.00 | |
| random_alerts | 50 | 50 | 100.00 | |||
| alert_handler_random_alerts | 67.570s | 1659.915us | 50 | 50 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 69.920s | 4444.955us | 50 | 50 | 100.00 | |
| ping_timeout | 17 | 50 | 34.00 | |||
| alert_handler_ping_timeout | 658.480s | 86270.315us | 17 | 50 | 34.00 | |
| lpg | 98 | 100 | 98.00 | |||
| alert_handler_lpg | 2499.750s | 58909.552us | 48 | 50 | 96.00 | |
| alert_handler_lpg_stub_clk | 2710.850s | 282863.684us | 50 | 50 | 100.00 | |
| stress_all | 49 | 50 | 98.00 | |||
| alert_handler_stress_all | 3066.720s | 61591.501us | 49 | 50 | 98.00 | |
| alert_handler_entropy_stress_test | 1 | 20 | 5.00 | |||
| alert_handler_entropy_stress | 28.610s | 1935.427us | 1 | 20 | 5.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 4.730s | 67.373us | 20 | 20 | 100.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| alert_handler_intr_test | 2.770s | 25.538us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| alert_handler_tl_errors | 22.000s | 1995.332us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| alert_handler_tl_errors | 22.000s | 1995.332us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| alert_handler_csr_hw_reset | 10.800s | 463.617us | 5 | 5 | 100.00 | |
| alert_handler_csr_rw | 11.870s | 258.716us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 208.160s | 40624.866us | 5 | 5 | 100.00 | |
| alert_handler_same_csr_outstanding | 46.590s | 500.965us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| alert_handler_csr_hw_reset | 10.800s | 463.617us | 5 | 5 | 100.00 | |
| alert_handler_csr_rw | 11.870s | 258.716us | 20 | 20 | 100.00 | |
| alert_handler_csr_aliasing | 208.160s | 40624.866us | 5 | 5 | 100.00 | |
| alert_handler_same_csr_outstanding | 46.590s | 500.965us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 334.060s | 42134.729us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 334.060s | 42134.729us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 334.060s | 42134.729us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 334.060s | 42134.729us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 1173.930s | 65626.117us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 98.090s | 5004.232us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| alert_handler_tl_intg_err | 98.090s | 5004.232us | 20 | 20 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 334.060s | 42134.729us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 59.210s | 4180.053us | 50 | 50 | 100.00 | |
| sec_cm_alert_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 59.210s | 4180.053us | 50 | 50 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 59.210s | 4180.053us | 50 | 50 | 100.00 | |
| sec_cm_class_config_regwen | 50 | 50 | 100.00 | |||
| alert_handler_smoke | 59.210s | 4180.053us | 50 | 50 | 100.00 | |
| sec_cm_alert_intersig_diff | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 55.630s | 1072.484us | 49 | 50 | 98.00 | |
| sec_cm_lpg_intersig_mubi | 48 | 50 | 96.00 | |||
| alert_handler_lpg | 2499.750s | 58909.552us | 48 | 50 | 96.00 | |
| sec_cm_esc_intersig_diff | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 55.630s | 1072.484us | 49 | 50 | 98.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 49 | 50 | 98.00 | |||
| alert_handler_entropy | 2709.450s | 129100.362us | 49 | 50 | 98.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 49 | 50 | 98.00 | |||
| alert_handler_entropy | 2709.450s | 129100.362us | 49 | 50 | 98.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 27.010s | 3846.357us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 35 | 50 | 70.00 | |||
| alert_handler_stress_all_with_rand_reset | 396.870s | 5289.281us | 35 | 50 | 70.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 30 test runs | |||
| alert_handler_ping_timeout | 93895511655275852108778498001544716382694020552146402683076419989331598339617 | 93 |
UVM_INFO @ 2628375803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 111118968463401721494923285524209115823674319155884395791176752073174233169708 | 84 |
UVM_INFO @ 636152170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 14001013300547355585716381404419804549704829134381824445100758961796956321235 | 90 |
UVM_INFO @ 1956691591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 70784957089468399012575485363641417248744618452915396920569603423481641579259 | 84 |
UVM_INFO @ 2011821774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 47271029655884368709952832302311666347598978356702294994637760634602498910840 | 96 |
UVM_INFO @ 3066139212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 5968956677871705257921783588604132269070782561763371954143959696705817227790 | 90 |
UVM_INFO @ 11588757598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 34044875357468766000035428593366368599078042665784032710303941606022563648346 | 102 |
UVM_INFO @ 63678992672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy | 98157919558217525510380624525734875692453122799346855555257827596732189768728 | 80 |
UVM_INFO @ 73425803755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 60402043043005125219192910793430098973083331177785296944936905332568462228834 | 90 |
UVM_INFO @ 4964385741 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 51274620415681085082223541130677506718135685110442924439862575473151222624067 | 93 |
UVM_INFO @ 2039970029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 67059717011618113633071067599545918374825469141266378525627977386270641861782 | 99 |
UVM_INFO @ 2866609943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 17803462332136008996465598443593739517603831816491006635991480522338722657413 | 153 |
UVM_INFO @ 79875363848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 7587128897825194571676829522736943695448701315452962354881744104423418324091 | 135 |
UVM_INFO @ 7237912089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 22460990951760004870532064738378257487714165134638875044345424179486459770018 | 93 |
UVM_INFO @ 10716771787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 114091970845288670635989925803484494114201833977515225964531173564793124929104 | 102 |
UVM_INFO @ 7619583334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 4188326237518382858422115839682544487807916598648341188640522111978049125796 | 132 |
UVM_INFO @ 77883050455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 80317387878712301064624559850601334595510729404152937350691992444652560805974 | 93 |
UVM_INFO @ 5799440207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 13466223092717250195321465430008557652002456960582740781852253017114666890771 | 111 |
UVM_INFO @ 14230657062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 17325165532940649172898090704885549332524606280351500587004537748896453224262 | 102 |
UVM_INFO @ 4680448514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 44669904712757188891318023006384590569446595000507302700159928999557671303544 | 114 |
UVM_INFO @ 9338057729 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 109845649412933173685010327478048201408170430023996839470165538575681749926378 | 100 |
UVM_INFO @ 2800666371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 102777977256360359792193925590845744370603440746233734112310069380106806465376 | 87 |
UVM_INFO @ 1003492712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 11225741388461373379121124644961380553137076722257707459491270162630995726458 | 105 |
UVM_INFO @ 3415653928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 24564811482786179289058368923346466420569023931179593415649659231127418484648 | 80 |
UVM_INFO @ 13181325791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 66378733398567684896407764679767542254311047337003586587435728342281656488315 | 136 |
UVM_INFO @ 6235868610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 6157896944211343716392474228596382226973040541116989672861047481180974694633 | 132 |
UVM_INFO @ 9219596214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 33572629874899563192397498404714419069330677288337365790431366133480715856053 | 93 |
UVM_INFO @ 2231521144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 79012393343919831898352468652806371723972782260186618551900550967728893931438 | 105 |
UVM_INFO @ 5213921447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 16000951900867435842544276044160018614585758188623591064562227764570784791267 | 87 |
UVM_INFO @ 4610311326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 113086192599742227390954375604269008378580832312400099358011402404799717939493 | 80 |
UVM_INFO @ 17318840712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 19 test runs | |||
| alert_handler_entropy_stress | 84506879053933803083571111977642563421037216815109090224797375527328669386197 | 184 |
UVM_INFO @ 90762164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 102920841374053549130241909649635672068680088412557468599296219315086523412896 | 178 |
UVM_INFO @ 320327187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 37945163520201476808450655845636532589537847107830884905420313281316318002580 | 200 |
UVM_INFO @ 88034296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 49415466633697595642547205977403421063192025214930830658452194572395850936290 | 186 |
UVM_INFO @ 139653892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 83474240204153599000635213916988693194548297170020900468375250288808010855236 | 118 |
UVM_INFO @ 53890800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 75596249815799839545306004247402778818763412582223547375895111228402787496744 | 176 |
UVM_INFO @ 1744098889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 16499623690548596239909609063800573442881926839095974255781252831657993434609 | 170 |
UVM_INFO @ 121727891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 61114244512238729722544382888388373765717191064118066571632467915198107938704 | 180 |
UVM_INFO @ 130301790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 12892769329771253723610134000846051666543717753036006523205253038106394323443 | 130 |
UVM_INFO @ 212492914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 110823107294772499821493752618530620285006517255225391758265564912434224311904 | 202 |
UVM_INFO @ 424360215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 53568836239251832286281488360093234066620752808330201404207767366142135706636 | 192 |
UVM_INFO @ 107135710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 90739219645056673631058827427710552081976962601087972530854662910056016241496 | 176 |
UVM_INFO @ 87035328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 91414763449441989147020636701547327766788549825435422333203449719774738404121 | 196 |
UVM_INFO @ 128933881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 44121655837750581749799991589786378612679643847662305597635203006398038901714 | 194 |
UVM_INFO @ 239841515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 30050069839952451335793291424511126665566579645807970406828386506185893408081 | 206 |
UVM_INFO @ 1935426636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 24183008778682331329849608350430409410540119345018298652981166037935283615589 | 198 |
UVM_INFO @ 158363007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 25934209542647375182406622767144853677360832813189845625944527200332371964236 | 150 |
UVM_INFO @ 206139084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 12688263513021162716872167341704252297123401421799561993520547034918885949242 | 184 |
UVM_INFO @ 403290360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 49957390741345554167367556780316419024504923803549203148075407004604938516272 | 204 |
UVM_INFO @ 514873181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1236) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 15 test runs | |||
| alert_handler_stress_all_with_rand_reset | 542097486733259465159187587703625348844036968983770586609925562157668351248 | 157 |
UVM_INFO @ 13598661833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 67356508591233653602815165184744075256826448993425311434891604898192045393 | 124 |
UVM_INFO @ 1124933635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 86539166106422033871007867315516304997820480471082393482186335491109440483169 | 220 |
UVM_INFO @ 4327140041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 31103459690695782502300954777783458080107142079640037531801957945073656480048 | 131 |
UVM_INFO @ 2598286888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 75680171998383211032741662895447170783117229207095951958266403379908034881743 | 116 |
UVM_INFO @ 2041863709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 104002107695098910227977285108862624330836617076348284831239842263277688296789 | 83 |
UVM_INFO @ 111212786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 88464349566718276816346050319264596407896944716875336413320732859195923290104 | 152 |
UVM_INFO @ 8216180361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 55764328671847800402615388925818588796775941019124587269637802250903450003797 | 96 |
UVM_INFO @ 3355424567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 73260681291876220536621645022189859887988206880608855404426075315050207114250 | 83 |
UVM_INFO @ 308836695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 56057970470810628858231795907529826007703250000570487794231697542579928902743 | 109 |
UVM_INFO @ 1676448771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 22202490308510743365109427671432978536431648875908637872774484589448222276122 | 196 |
UVM_INFO @ 3167485129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 28146836103959749437569657973485672016977018398220648685627678337148692043080 | 165 |
UVM_INFO @ 9405261692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 39528699667233699164122840067989774426463830286041943272255894719261813601796 | 102 |
UVM_INFO @ 789865727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 79438233835484334911149232954734251367643510122030839027182732616380046505782 | 95 |
UVM_INFO @ 502551293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 33256488779066723582011484234283394871554960090998605212656620194163676455356 | 84 |
UVM_INFO @ 6569046714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. | 6 test runs | |||
| alert_handler_ping_timeout | 48828183655826847727723028011100969924222834128077227207231645648719522354965 | 80 |
UVM_INFO @ 201362905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 106862276913768453772201760429565024803688471543447936624587549354799017058912 | 80 |
UVM_INFO @ 65421613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 57501249009064717673429860902480529332953793914088796991391891437065896606455 | 80 |
UVM_INFO @ 5056188453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 4080451171318053151466336125616069841981723103465086138772470951690590459018 | 80 |
UVM_INFO @ 588090558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 53389016702436133623343757396379992676123121318778335711651864692641747878146 | 80 |
UVM_INFO @ 1223831524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 86818088099595196371148791542985931263188058744271264396938220175730164488788 | 80 |
UVM_INFO @ 656859449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) | 2 test runs | |||
| alert_handler_sig_int_fail | 31813161203629482390707575365342173144354072367006780123383852590563960688483 | 81 |
UVM_INFO @ 595105763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all | 37908532456960410854602805881526861923196260737989399835475480633726917761021 | 215 |
UVM_INFO @ 235964060826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|