Simulation Results: alert_handler

 
23/05/2026 11:52:00 DVSim: v1.49.0 sha: 21f062e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 99.11 %
  • code
  • 98.92 %
  • assert
  • 98.88 %
  • func
  • 99.52 %
  • line
  • 99.99 %
  • branch
  • 99.99 %
  • cond
  • 97.51 %
  • toggle
  • 97.09 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
91.27%
V2S
98.87%
V3
46.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
alert_handler_smoke 67.210s 6015.712us 50 50 100.00
csr_hw_reset 5 5 100.00
alert_handler_csr_hw_reset 5.510s 139.702us 5 5 100.00
csr_rw 20 20 100.00
alert_handler_csr_rw 13.000s 255.831us 20 20 100.00
csr_bit_bash 5 5 100.00
alert_handler_csr_bit_bash 224.130s 15021.612us 5 5 100.00
csr_aliasing 5 5 100.00
alert_handler_csr_aliasing 201.870s 7918.403us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
alert_handler_csr_mem_rw_with_rand_reset 16.600s 364.119us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
alert_handler_csr_rw 13.000s 255.831us 20 20 100.00
alert_handler_csr_aliasing 201.870s 7918.403us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 50 50 100.00
alert_handler_esc_alert_accum 337.850s 26786.185us 50 50 100.00
esc_timeout 50 50 100.00
alert_handler_esc_intr_timeout 77.820s 5480.162us 50 50 100.00
entropy 50 50 100.00
alert_handler_entropy 2779.330s 990190.989us 50 50 100.00
sig_int_fail 50 50 100.00
alert_handler_sig_int_fail 76.620s 7082.501us 50 50 100.00
clk_skew 50 50 100.00
alert_handler_smoke 67.210s 6015.712us 50 50 100.00
random_alerts 50 50 100.00
alert_handler_random_alerts 73.730s 2621.823us 50 50 100.00
random_classes 50 50 100.00
alert_handler_random_classes 77.000s 1387.695us 50 50 100.00
ping_timeout 14 50 28.00
alert_handler_ping_timeout 453.840s 56610.873us 14 50 28.00
lpg 97 100 97.00
alert_handler_lpg 3185.360s 140308.202us 47 50 94.00
alert_handler_lpg_stub_clk 3030.390s 439195.199us 50 50 100.00
stress_all 47 50 94.00
alert_handler_stress_all 3835.890s 158083.887us 47 50 94.00
alert_handler_entropy_stress_test 0 20 0.00
alert_handler_entropy_stress 32.280s 1278.547us 0 20 0.00
alert_handler_alert_accum_saturation 20 20 100.00
alert_handler_alert_accum_saturation 5.190s 871.727us 20 20 100.00
intr_test 50 50 100.00
alert_handler_intr_test 2.510s 16.608us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
alert_handler_tl_errors 29.860s 390.291us 20 20 100.00
tl_d_illegal_access 20 20 100.00
alert_handler_tl_errors 29.860s 390.291us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
alert_handler_csr_hw_reset 5.510s 139.702us 5 5 100.00
alert_handler_csr_rw 13.000s 255.831us 20 20 100.00
alert_handler_csr_aliasing 201.870s 7918.403us 5 5 100.00
alert_handler_same_csr_outstanding 48.340s 1292.797us 20 20 100.00
tl_d_partial_access 50 50 100.00
alert_handler_csr_hw_reset 5.510s 139.702us 5 5 100.00
alert_handler_csr_rw 13.000s 255.831us 20 20 100.00
alert_handler_csr_aliasing 201.870s 7918.403us 5 5 100.00
alert_handler_same_csr_outstanding 48.340s 1292.797us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
alert_handler_shadow_reg_errors 373.430s 9174.764us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
alert_handler_shadow_reg_errors 373.430s 9174.764us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
alert_handler_shadow_reg_errors 373.430s 9174.764us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
alert_handler_shadow_reg_errors 373.430s 9174.764us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
alert_handler_shadow_reg_errors_with_csr_rw 1069.730s 30000.026us 20 20 100.00
tl_intg_err 25 25 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
alert_handler_tl_intg_err 68.160s 16660.853us 20 20 100.00
sec_cm_bus_integrity 20 20 100.00
alert_handler_tl_intg_err 68.160s 16660.853us 20 20 100.00
sec_cm_config_shadow 20 20 100.00
alert_handler_shadow_reg_errors 373.430s 9174.764us 20 20 100.00
sec_cm_ping_timer_config_regwen 50 50 100.00
alert_handler_smoke 67.210s 6015.712us 50 50 100.00
sec_cm_alert_config_regwen 50 50 100.00
alert_handler_smoke 67.210s 6015.712us 50 50 100.00
sec_cm_alert_loc_config_regwen 50 50 100.00
alert_handler_smoke 67.210s 6015.712us 50 50 100.00
sec_cm_class_config_regwen 50 50 100.00
alert_handler_smoke 67.210s 6015.712us 50 50 100.00
sec_cm_alert_intersig_diff 50 50 100.00
alert_handler_sig_int_fail 76.620s 7082.501us 50 50 100.00
sec_cm_lpg_intersig_mubi 47 50 94.00
alert_handler_lpg 3185.360s 140308.202us 47 50 94.00
sec_cm_esc_intersig_diff 50 50 100.00
alert_handler_sig_int_fail 76.620s 7082.501us 50 50 100.00
sec_cm_alert_rx_intersig_bkgn_chk 50 50 100.00
alert_handler_entropy 2779.330s 990190.989us 50 50 100.00
sec_cm_esc_tx_intersig_bkgn_chk 50 50 100.00
alert_handler_entropy 2779.330s 990190.989us 50 50 100.00
sec_cm_esc_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_ping_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_esc_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_ping_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_esc_timer_fsm_global_esc 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_accu_ctr_redun 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_esc_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_ping_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
sec_cm_ping_timer_lfsr_redun 5 5 100.00
alert_handler_sec_cm 24.770s 618.446us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 23 50 46.00
alert_handler_stress_all_with_rand_reset 381.450s 13933.558us 23 50 46.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state 31 test runs
alert_handler_ping_timeout 39206115922460079954471878690772279847057794586472881926960772061435868507073 114
UVM_INFO @ 27184209638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 69083310818259413185176132308078765987425206562396570686983150184817188375264 129
UVM_INFO @ 14941382218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 110061492280128650677107103335085592100878960989245812804980094481590168430397 138
UVM_INFO @ 11375180488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 98998897244199073014528357439454497989287844724493276494886707506476497018238 96
UVM_INFO @ 2043732626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 104921668329821421831587308033637817125525563221513862254152589702023882622073 117
UVM_INFO @ 13205222452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 11190419196878940798270514244335944274491868323739693905835545709146305333483 82
UVM_INFO @ 252361910155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 92706866956514113323755273593966812368374679757832906537770906163757291473241 99
UVM_INFO @ 8199407953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 113064537406136482719555506863336689189515424714882014214136035521666456574087 124
UVM_INFO @ 9863251171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 96141269840148862149898518199684019435619011794440546613611018543837008981293 105
UVM_INFO @ 13889148308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 104029050690989577483726474042711539011811187741508328963612183255196788829283 123
UVM_INFO @ 16713041158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 46825127509732284724127414741414111266684301022470979092586008350096720628289 93
UVM_INFO @ 13259166405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 112542315973684657612039796537705989468551547705540793173397885749687466648965 87
UVM_INFO @ 1226384682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 110412873328957290865659828727587219089338869807362927567286579107245836873743 90
UVM_INFO @ 6150887090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 51974380394584259877723500350868785495519876176905543334086222491274824098038 114
UVM_INFO @ 27486493749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 40536504415404322787363172067667772007853234607074756248513418459649233965667 102
UVM_INFO @ 14845731240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 104629334023808203638326284685475269990752906483851661443290398850954721238172 142
UVM_INFO @ 10144208588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 6790525484256639990100802707999364680239181305780479847349569290898259151161 102
UVM_INFO @ 5836349220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 31421755851136130796167936887284924432334402432009268978035322061531112919345 99
UVM_INFO @ 9425391350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 77654897948247870692852241704713798850498117158266922679425265468500985731646 114
UVM_INFO @ 23414276052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 92593429526936799833382991036328931899102160228987070770728293813697561807528 130
UVM_INFO @ 9317383970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 12844788771853772819069934482561965249937921352724470617462033675991480230269 95
UVM_INFO @ 5776918436 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 39307748330243810283677135988384760448735920959962498546312225537568516382648 87
UVM_INFO @ 15903121091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 31987606844334599721163152104475138356580198430672459402440318938250247757597 99
UVM_INFO @ 3065822903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 72128181275232859947974910689845346490665334268181586530128155111382616515440 99
UVM_INFO @ 2392812965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 18444554464823210977150805284743040062440031204117765468745000658317270843370 87
UVM_INFO @ 16727349239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 42302539415220606865769550737283695576038030922017280297233909204890164530484 114
UVM_INFO @ 7033306818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 11305633075990936365778654712893528380890744076916439563600967444583706820933 109
UVM_INFO @ 5622492668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 98261624949470826309532509131438845155138736780452716476689876071740673429154 108
UVM_INFO @ 18043638705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 99465854384482831522186576861386932341563708105455190103823115551600884055115 93
UVM_INFO @ 1395492054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 110054844906230505400849667870637307761059372881309133877986070523270477887073 110
UVM_INFO @ 8315416309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 69093729960954397420226143944489599977786926350546388736951911923632585164665 111
UVM_INFO @ 6452441654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 27 test runs
alert_handler_stress_all_with_rand_reset 76171881904201059398907244757760125664605047656106891961653633016717864148425 86
UVM_INFO @ 650111157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 16157091755863534385541199704424461178742265599745593618749633514477908174017 163
UVM_INFO @ 1173278181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 32123570762803294690096866132586874264760963807055140622061312082821683213156 121
UVM_INFO @ 23864095485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 75074609384604165300502933239247341148899364297701469520983930160770811572369 83
UVM_INFO @ 442878895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 22176972687465288718248146348632943727620099760930749801122884128730684204588 118
UVM_INFO @ 3301366616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 41255151314508534045215976696579038274688596825241114523840606433548104629807 125
UVM_INFO @ 21634028232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 109212307308694642502378592794023960624421712557856614786470265065598091485624 104
UVM_INFO @ 4046159989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 83823455259619457556654326496312506906833941426169598007168966359079134438686 115
UVM_INFO @ 3215504016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 45860416501179797371868687262254419292918163667061920196848374761823346313007 120
UVM_INFO @ 1089050746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 66536501170842684624461837786022794170372932704747734927319327714274766943221 83
UVM_INFO @ 3210204257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 78254683708783102263060969374527683654906738198570921162082002919945272546978 82
UVM_INFO @ 7102280226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 52056313833730837933548351983519726785615853014696443248550338909450176964370 136
UVM_INFO @ 1757365495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 109363099018706659962790735027317380471655798451040622697379092224743394498032 148
UVM_INFO @ 10245334406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 9270104751715160016940363861285796227051212876740343642448624561617441372694 113
UVM_INFO @ 6019262350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 35095153690660576773782773074156870422162217280162866199060511204589271510800 101
UVM_INFO @ 1135761862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 2657940271866705878168376367157403143144221514693914551539404130927809440842 83
UVM_INFO @ 105968840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 6907267275598041623261448895036951535847794876202746163447667524321663888335 129
UVM_INFO @ 9250232841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 34523667765786563049313581891715368007666056123698502676884128822855479861385 106
UVM_INFO @ 4670436550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 92695820093073712849087184193185656573849120159397497204655816968917937286685 112
UVM_INFO @ 1879385442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 55166337025134014688995956841887844365493545396131731539560877557125903808616 101
UVM_INFO @ 2747394969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 75428803603973589965936117774857912397787916396203360204995360383603144740129 102
UVM_INFO @ 3594910559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 3751015152164725942755872901875558662893553079445648671332231883122390951089 112
UVM_INFO @ 2168195405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 64957990833012956976972171907702640499249595696674890367212591629578440573058 99
UVM_INFO @ 1052226632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 61821711016439467412931678530395448262267826935450364093067252303463273620304 153
UVM_INFO @ 4659241131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 68617360473243275283714932907136390557200822808856950706835131385071204602535 103
UVM_INFO @ 3734923055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 134459217912740859242326660841748553445113063379597882995329819325937485315 172
UVM_INFO @ 28567190264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 72021074452302755711482455446468822193011189854504828794911085457948214983792 119
UVM_INFO @ 3488947231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 20 test runs
alert_handler_entropy_stress 36569414738765085793389191595139558281499577714073729513267480119747132797538 182
UVM_INFO @ 707928686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 75399565449720016683422992435566201812265242499160006165540447204870571111540 166
UVM_INFO @ 363858333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 87069624094486929164219819998233284765503325875835153337236317336390114644737 172
UVM_INFO @ 59021071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 76560357403313908952491783248357793824977984017457440608757770058330418458053 174
UVM_INFO @ 91070533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 102124966212615146062889124615380063939316007727715086845297858606467112935780 206
UVM_INFO @ 183971989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 42046453712551065909702702951958836129591521914368220607262027521308624089944 194
UVM_INFO @ 1278546628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 58230332041068548233053638197781159449573194351996112295068901401481305798662 204
UVM_INFO @ 520001842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 41151553500079664576709537394817964579429343026630436375195840090062397565710 172
UVM_INFO @ 239180590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 33757185854179040753273056756604903106544891418054219565467986828255745359464 186
UVM_INFO @ 120601776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 68445223894662001548787574408397800533375139112230558676855521130546681521808 182
UVM_INFO @ 647129495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 12018995422096063921920841030001068526038423562794020431692135770974441956516 178
UVM_INFO @ 1510172281 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 87343730666964657213181036046283896867754802177395942332925930835150677174843 182
UVM_INFO @ 337300513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 100019020640872075159133329069609413428005338537799005831566267840707024133901 178
UVM_INFO @ 303834856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 54820555201927978366930361076089620427493973076350365921876278228528285491146 148
UVM_INFO @ 67619751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 110377088008300563158236998387138182724695470731966858981868668128276256423308 176
UVM_INFO @ 130375779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 22399811522209689799955417627864820139257538943891483176366864340135890545556 206
UVM_INFO @ 422865496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 95616441805036584274569218701203352316896576726990741899009818180932916041535 120
UVM_INFO @ 45598698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 37171955992781714196115147892971170106519793044503253647509052828333929554359 206
UVM_INFO @ 636292112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 59962709616278899106033194346672235085552920749848931377760540619938875860965 198
UVM_INFO @ 140600400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 106254507828981745284798917415952574727507929357286723260953266581559239281956 184
UVM_INFO @ 228150828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. 7 test runs
alert_handler_ping_timeout 34206022039369268442968224897155506905497279079721326948414447189920710553311 80
UVM_INFO @ 1098069755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 96863322908836598271186123605202852160670837573230119117392954954707685631220 80
UVM_INFO @ 1581076587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 32802501893503863032313933865576939388449025138846532078807994720666146609016 80
UVM_INFO @ 328445024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 76029304314864673989451563220988501636039460311481379975764651987742039838897 80
UVM_INFO @ 489634865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 101806482163643513386223946688111516834987050389386020639409717114858903825616 80
UVM_INFO @ 238652931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 34059988266922166393679442217454159903952221976917723614912295483684064964471 80
UVM_INFO @ 2270853410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 17314500767557664948745508325129741454722314186220683589324039178361929667106 80
UVM_INFO @ 166331639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) 2 test runs
alert_handler_stress_all 107649138741098243503968400809029985199923455878699314215995856057547005494088 209
UVM_INFO @ 2333723490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all 114626874217927506446770622088945808150631499748926661356386778585632031689431 114
UVM_INFO @ 1807035636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 1 test run
alert_handler_lpg 115121590563485918625280647919376712908166705414408726569595418240882965007751 82
UVM_INFO @ 1000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classa_state 1 test run
alert_handler_stress_all 112315297955850381578817430575283091374739480532682501224464957023801503876905 123
UVM_INFO @ 64800025546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---