Simulation Results: alert_handler

 
30/05/2026 15:09:44 DVSim: v1.49.0 sha: 1bd5f9a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.98 %
  • code
  • 98.84 %
  • assert
  • 98.88 %
  • func
  • 99.23 %
  • line
  • 99.99 %
  • branch
  • 99.99 %
  • cond
  • 97.54 %
  • toggle
  • 96.68 %
  • FSM
  • 100.00 %
Validation stages
V1
100.00%
V2
89.35%
V2S
97.07%
V3
60.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 10 10 100.00
alert_handler_smoke 83.470s 27359.939us 10 10 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 4.600s 21.745us 1 1 100.00
csr_rw 5 5 100.00
alert_handler_csr_rw 10.920s 243.170us 5 5 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 117.540s 1671.010us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 64.180s 1889.621us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
alert_handler_csr_mem_rw_with_rand_reset 14.020s 168.642us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
alert_handler_csr_rw 10.920s 243.170us 5 5 100.00
alert_handler_csr_aliasing 64.180s 1889.621us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 25 25 100.00
alert_handler_esc_alert_accum 336.310s 57743.339us 25 25 100.00
esc_timeout 50 50 100.00
alert_handler_esc_intr_timeout 80.830s 5728.759us 50 50 100.00
entropy 24 25 96.00
alert_handler_entropy 2853.120s 231305.808us 24 25 96.00
sig_int_fail 49 50 98.00
alert_handler_sig_int_fail 86.080s 7558.834us 49 50 98.00
clk_skew 10 10 100.00
alert_handler_smoke 83.470s 27359.939us 10 10 100.00
random_alerts 10 10 100.00
alert_handler_random_alerts 37.790s 1144.881us 10 10 100.00
random_classes 50 50 100.00
alert_handler_random_classes 84.050s 10651.051us 50 50 100.00
ping_timeout 22 50 44.00
alert_handler_ping_timeout 492.990s 13629.973us 22 50 44.00
lpg 96 100 96.00
alert_handler_lpg 2676.620s 113596.737us 46 50 92.00
alert_handler_lpg_stub_clk 2988.170s 653281.639us 50 50 100.00
stress_all 49 50 98.00
alert_handler_stress_all 3672.900s 1204461.177us 49 50 98.00
alert_handler_entropy_stress_test 1 20 5.00
alert_handler_entropy_stress 33.120s 666.544us 1 20 5.00
alert_handler_alert_accum_saturation 20 20 100.00
alert_handler_alert_accum_saturation 5.190s 203.927us 20 20 100.00
intr_test 10 10 100.00
alert_handler_intr_test 2.380s 10.931us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
alert_handler_tl_errors 29.640s 1782.267us 25 25 100.00
tl_d_illegal_access 25 25 100.00
alert_handler_tl_errors 29.640s 1782.267us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
alert_handler_csr_hw_reset 4.600s 21.745us 1 1 100.00
alert_handler_csr_rw 10.920s 243.170us 5 5 100.00
alert_handler_csr_aliasing 64.180s 1889.621us 1 1 100.00
alert_handler_same_csr_outstanding 37.770s 614.979us 5 5 100.00
tl_d_partial_access 12 12 100.00
alert_handler_csr_hw_reset 4.600s 21.745us 1 1 100.00
alert_handler_csr_rw 10.920s 243.170us 5 5 100.00
alert_handler_csr_aliasing 64.180s 1889.621us 1 1 100.00
alert_handler_same_csr_outstanding 37.770s 614.979us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
alert_handler_shadow_reg_errors 327.090s 20576.599us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
alert_handler_shadow_reg_errors 327.090s 20576.599us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
alert_handler_shadow_reg_errors 327.090s 20576.599us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
alert_handler_shadow_reg_errors 327.090s 20576.599us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
alert_handler_shadow_reg_errors_with_csr_rw 1025.350s 58955.261us 20 20 100.00
tl_intg_err 30 30 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
alert_handler_tl_intg_err 92.670s 1272.071us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
alert_handler_tl_intg_err 92.670s 1272.071us 25 25 100.00
sec_cm_config_shadow 20 20 100.00
alert_handler_shadow_reg_errors 327.090s 20576.599us 20 20 100.00
sec_cm_ping_timer_config_regwen 10 10 100.00
alert_handler_smoke 83.470s 27359.939us 10 10 100.00
sec_cm_alert_config_regwen 10 10 100.00
alert_handler_smoke 83.470s 27359.939us 10 10 100.00
sec_cm_alert_loc_config_regwen 10 10 100.00
alert_handler_smoke 83.470s 27359.939us 10 10 100.00
sec_cm_class_config_regwen 10 10 100.00
alert_handler_smoke 83.470s 27359.939us 10 10 100.00
sec_cm_alert_intersig_diff 49 50 98.00
alert_handler_sig_int_fail 86.080s 7558.834us 49 50 98.00
sec_cm_lpg_intersig_mubi 46 50 92.00
alert_handler_lpg 2676.620s 113596.737us 46 50 92.00
sec_cm_esc_intersig_diff 49 50 98.00
alert_handler_sig_int_fail 86.080s 7558.834us 49 50 98.00
sec_cm_alert_rx_intersig_bkgn_chk 24 25 96.00
alert_handler_entropy 2853.120s 231305.808us 24 25 96.00
sec_cm_esc_tx_intersig_bkgn_chk 24 25 96.00
alert_handler_entropy 2853.120s 231305.808us 24 25 96.00
sec_cm_esc_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_ping_timer_fsm_sparse 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_esc_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_ping_timer_fsm_local_esc 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_esc_timer_fsm_global_esc 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_accu_ctr_redun 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_esc_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_ping_timer_ctr_redun 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
sec_cm_ping_timer_lfsr_redun 5 5 100.00
alert_handler_sec_cm 29.190s 2195.535us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 6 10 60.00
alert_handler_stress_all_with_rand_reset 373.910s 4307.154us 6 10 60.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state 24 test runs
alert_handler_ping_timeout 114639988631226429488061025575345339331027901677974673857827749473793136686304 96
UVM_INFO @ 5929362061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 19656040833532398404928099320697394988131040286374540404301999499138142526694 97
UVM_INFO @ 14187702859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 107556418689721292987506645674530205504374456184605369890467833853453688935353 111
UVM_INFO @ 16932492718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 66191987581373635181742764924907391608685596087140883129305208948855678865614 111
UVM_INFO @ 15110016763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 11635363594194255508758676247083349358349015670972627036065868606757321754157 118
UVM_INFO @ 5641315391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 85704482481156693001549140116077833272223481473786208038220359536521810943566 110
UVM_INFO @ 20586034375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 48993968739937614610882721449001763218487258468881918219250502822386579542869 82
UVM_INFO @ 42903215427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 66269943908934096808577990942290373053849363907973085596739195577638449905310 126
UVM_INFO @ 94619409402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 40954683793081673308946167950597949013359842029892941661132933619046850130931 80
UVM_INFO @ 16310597388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 109056432063021288590657721337739590280634990929880132017857786163727752705582 90
UVM_INFO @ 7096457861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 18052796150237376483699650381395464001798415789724035323983184182609680666307 87
UVM_INFO @ 3574355295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 50708088630260147989619411702731927489261513121590777482561047950499443082229 132
UVM_INFO @ 14477081904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 114602304430926948699834788278826509781285822047186501875754634768824934705126 144
UVM_INFO @ 73642048269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 14210093782994287711177122426493487053764997671170233621715012190340376589449 102
UVM_INFO @ 4772009149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 16751381936498969081756304386929064459471510113522240794130508874242320035502 87
UVM_INFO @ 7070262543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 12689048577070973154603933202931025065361725656534154906246788044952989789341 94
UVM_INFO @ 4559497011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_lpg 75419842184327850396921320095391880140556841111339698452152281604499382565732 81
UVM_INFO @ 3562853845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 26627697805096020895671445311377439814650381360618362972705575326231948874526 105
UVM_INFO @ 8823567429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 66586465527366495913532873356296603377244796008791200415301809099747166879635 89
UVM_INFO @ 3225663227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 54304540516816399110430957269187678934455402630584060559111424994835545709979 84
UVM_INFO @ 4111515292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 84971638603805511509176091578810566752206074850675154898616818064796916705861 108
UVM_INFO @ 16777947364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 87593531857061945382478808961175928914588662006426626295733604022385091244179 123
UVM_INFO @ 11129631062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 110057438342159327417584167661878777025911735563526044559370523374440668880911 87
UVM_INFO @ 1233775018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 47831317763986202403371812983426923829502841066365281795389359869928386569564 114
UVM_INFO @ 6083115556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 19 test runs
alert_handler_entropy_stress 36688569900124544616043993935920667276152949894772168504688707354915662811380 202
UVM_INFO @ 102708160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 17801208568451181614018046428809772488252377000477215532609062954429168258019 194
UVM_INFO @ 1589901102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 15167988705004454975410739881151378481601397286818718588160183735193241443113 170
UVM_INFO @ 1576636929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 66388051439034827691258616906818233441010759855066456240874987405565318266953 170
UVM_INFO @ 4542014519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 93845886382481787571899392094799922091268244857420560272916811672538973004870 194
UVM_INFO @ 322497796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 115085668318017339158275980490022021086101330316790298787484316846165704181226 202
UVM_INFO @ 420717824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 74259712261572419512520710951436076552342984515425216616046160697053432176066 198
UVM_INFO @ 427376259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 72727326186966925096736089395843940578030819072665522086709248417552858963709 174
UVM_INFO @ 130424775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 70085855453538107727808373495220905397418398311266950951009369726506161290979 184
UVM_INFO @ 659771751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 59251572784838262067586990512154127046312053378817047705419642216271537097319 190
UVM_INFO @ 1403450148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 110353049831774321088987276290223758829574700982979902524419911253349690304787 178
UVM_INFO @ 515746237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 78318101113291797743824771154677556094632665996685369969518122733703457121066 204
UVM_INFO @ 940547146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 86843711756678687604176373929312192552038966313791662107882019698525295650777 176
UVM_INFO @ 123445041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 24744775032083673504821824231719654082645393450930910186256646888025843070804 176
UVM_INFO @ 587105442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 16388746605125663953314278939441927956694452151467852973714545301343176984486 186
UVM_INFO @ 415479021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 101808089853234315998740202664247559563787024607391098021771298793958979613207 182
UVM_INFO @ 261395223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 18373376711098999515650592194085083607211977475925652608494383125214122359979 164
UVM_INFO @ 1182603860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 10560725946858796436701965347661654001503151164240689215820732557752474628757 202
UVM_INFO @ 220447159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_entropy_stress 110724516390972253132835863402688930625220166100306672367932676089652367544766 126
UVM_INFO @ 491324670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. 7 test runs
alert_handler_ping_timeout 108394054225269310482601465778276729799746894057884940781834305045567860619606 80
UVM_INFO @ 8047038237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 62755751484923936577897167885504534797203395150022689311116385498281877717988 80
UVM_INFO @ 694924491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 72977191100763931524730282948743030533294922669445569127615204677435361983078 80
UVM_INFO @ 211738462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 46735292655414315648981722437845135072348135878675504202148072082698995449330 80
UVM_INFO @ 1321845755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 32416461608618077087135009124851497698617618756621226133534569866738439605144 80
UVM_INFO @ 873573528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 11160100663935307031976303287849667942300626073625709106069108844447476409520 80
UVM_INFO @ 558302623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_ping_timeout 39889973150008382015557800331481393363335665039593009568971797028078173199615 80
UVM_INFO @ 923225946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 4 test runs
alert_handler_stress_all_with_rand_reset 75434171168005751048888527273056553898165320928224524861413198706573610664966 133
UVM_INFO @ 1748975700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 72498916451252258318336841441659793934834746432268870959630175485582263823053 83
UVM_INFO @ 220918880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 110495834680670214132799430559451387774745177058469192822698830450890346187849 105
UVM_INFO @ 1078301333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
alert_handler_stress_all_with_rand_reset 8156826435286337436850753442968046365939628688373290687976030344633760294182 102
UVM_INFO @ 643262187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classd_accum_cnt 1 test run
alert_handler_entropy 41011383361642239150643022723852834230646254536937644429425981752180948981561 81
UVM_INFO @ 22454953397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.classd_esc_cnt 1 test run
alert_handler_stress_all 72969774154773173716662858007961501471576281149339047418975261999052971846744 318
UVM_INFO @ 4503642486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:341) [scoreboard] Check failed cycle_cnt <= exp_cycle (* [*] vs * [*]) 1 test run
alert_handler_sig_int_fail 87378160290027372118659252697344204228605796957531397629617719143718078538039 83
UVM_INFO @ 47082994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 1 test run
alert_handler_lpg 52293926346142608538874909967398045674080686784023204594960757667194188973987 81
UVM_INFO @ 1000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---