Simulation Results: gpio

 
30/05/2026 15:09:44 DVSim: v1.49.0 sha: 1bd5f9a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 99.00 %
  • code
  • 98.27 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.94 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
45.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.930s 414.440us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.680s 317.932us 10 10 100.00
gpio_smoke_en_cdc_prim 1.700s 75.070us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.810s 86.309us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.980s 25.346us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.980s 17.604us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.330s 293.097us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.150s 15.167us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.870s 27.449us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.980s 17.604us 5 5 100.00
gpio_csr_aliasing 1.150s 15.167us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.580s 75.201us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.690s 34.147us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.280s 103.243us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.690s 418.946us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 4.190s 180.494us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 2.860s 94.766us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 20.650s 916.986us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 7.200s 604.024us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.440s 96.210us 10 10 100.00
stress_all 0 10 0.00
gpio_stress_all 47.210s 10077.270us 0 10 0.00
alert_test 10 10 100.00
gpio_alert_test 0.950s 39.219us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 1.010s 83.570us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.700s 390.583us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.700s 390.583us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.980s 17.604us 5 5 100.00
gpio_same_csr_outstanding 1.180s 18.953us 5 5 100.00
gpio_csr_aliasing 1.150s 15.167us 1 1 100.00
gpio_csr_hw_reset 0.980s 25.346us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.980s 17.604us 5 5 100.00
gpio_same_csr_outstanding 1.180s 18.953us 5 5 100.00
gpio_csr_aliasing 1.150s 15.167us 1 1 100.00
gpio_csr_hw_reset 0.980s 25.346us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.980s 183.549us 25 25 100.00
gpio_sec_cm 1.440s 330.523us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.980s 183.549us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 9 10 90.00
gpio_rand_straps 0.960s 13.970us 9 10 90.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 8.250s 256.691us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 11 test runs
gpio_stress_all 64417882125962597751701780782931324250561524169791942116766566999960266712531 534
UVM_INFO @ 744642201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 19682721543580851696326892424241393020473490294937784260379098066878348148715 78
UVM_INFO @ 620229721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 104177108284525044652439316309753174441953864632951149953527537428375590826001 1827
UVM_INFO @ 10077269615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 97079443233214246054843787429998708408468565736381942758867631691836068400955 430
UVM_INFO @ 9756225482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35619753035710406222870664029545453664252299917866667715642550999218418561922 76
UVM_INFO @ 33600151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 96167808994390825980481604984126571639094901977734958972502282672221677397871 262
UVM_INFO @ 1080190791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 54874675438120583171743533365547540760812452954979902338604843850888499729109 75
UVM_INFO @ 2320149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 50891371863950094547134964174238433002783860559328349206249156852462883302230 247
UVM_INFO @ 607422427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 109748109946909158397732919498733053319722771001540753606784073609790255472981 278
UVM_INFO @ 5789514190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89560408266995256716669210252979997163189996233574593014211145060372742381803 1119
UVM_INFO @ 1502237721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 34569860778965248964309733311507991491272750562267739864458479724867269102661 437
UVM_INFO @ 6101788096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 7 test runs
gpio_stress_all_with_rand_reset 31978052588273110023090966893753035680339205677105481952665576959913500485229 282
UVM_INFO @ 670205439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 32475611742180037563917205991044709907668117589895989324849616372982655475741 80
UVM_INFO @ 5765672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 51305891865612341249082326348507439256448677683353836918967307920464702635219 234
UVM_INFO @ 1392054055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74693352868499377316509897350791954777267572820022627721300830462553313248325 81
UVM_INFO @ 70654377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20561800498510088462311162383161668877153815979916059324315363334855473702319 80
UVM_INFO @ 17502023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 53392003288776931840092072102287617577593004764632188715736512548596992670253 84
UVM_INFO @ 1222605335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68373609856007554004440330861920825825957462268053096291465759008237127126287 80
UVM_INFO @ 6704299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 3 test runs
gpio_stress_all_with_rand_reset 46193791714274533851097519893516773506621635116221663828372260421546042061198 352
UVM_INFO @ 256691065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104627794704603606101818611586495419454397424769105615515642632683628324240739 80
UVM_INFO @ 1214907262 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69789598981118199714504333888583730286513694356355261742476007633038977767080 78
UVM_INFO @ 9490744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---