Simulation Results: flash_ctrl

 
06/06/2026 15:22:54 DVSim: v1.49.0 sha: 2348eb2 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.05 %
  • code
  • 95.78 %
  • assert
  • 97.01 %
  • func
  • 98.36 %
  • line
  • 96.10 %
  • branch
  • 97.45 %
  • cond
  • 94.86 %
  • toggle
  • 98.66 %
  • FSM
  • 91.84 %
Validation stages
V1
100.00%
V2
99.36%
V2S
99.58%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
flash_ctrl_smoke 151.890s 97.093us 50 50 100.00
smoke_hw 5 5 100.00
flash_ctrl_smoke_hw 22.280s 31.631us 5 5 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 14.680s 96.946us 1 1 100.00
csr_rw 5 5 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 35.580s 7933.022us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 24.850s 882.119us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 17.920s 27.493us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
flash_ctrl_csr_aliasing 24.850s 882.119us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 12.140s 209.446us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 7.260s 18.447us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 5 5 100.00
flash_ctrl_sw_op 27.340s 48.136us 5 5 100.00
host_read_direct 5 5 100.00
flash_ctrl_host_dir_rd 101.880s 267.611us 5 5 100.00
rma_hw_if 43 43 100.00
flash_ctrl_hw_rma 1607.650s 439735.364us 3 3 100.00
flash_ctrl_hw_rma_reset 842.930s 180205.299us 20 20 100.00
flash_ctrl_lcmgr_intg 14.920s 143.141us 20 20 100.00
host_controller_arb 5 5 100.00
flash_ctrl_host_ctrl_arb 1817.940s 367402.235us 5 5 100.00
erase_suspend 5 5 100.00
flash_ctrl_erase_suspend 305.370s 5620.403us 5 5 100.00
program_reset 29 30 96.67
flash_ctrl_prog_reset 3604.012s 0.000us 29 30 96.67
full_memory_access 5 5 100.00
flash_ctrl_full_mem_access 4049.260s 222064.500us 5 5 100.00
rd_buff_eviction 5 5 100.00
flash_ctrl_rd_buff_evict 128.030s 11312.899us 5 5 100.00
rd_buff_eviction_w_ecc 102 105 97.14
flash_ctrl_rw_evict 33.490s 120.140us 37 40 92.50
flash_ctrl_rw_evict_all_en 32.840s 28.297us 40 40 100.00
flash_ctrl_re_evict 33.150s 72.009us 25 25 100.00
host_arb 20 20 100.00
flash_ctrl_phy_arb 419.760s 4641.896us 20 20 100.00
host_interleave 20 20 100.00
flash_ctrl_phy_arb 419.760s 4641.896us 20 20 100.00
memory_protection 20 20 100.00
flash_ctrl_mp_regions 556.720s 21086.442us 20 20 100.00
fetch_code 10 10 100.00
flash_ctrl_fetch_code 33.070s 664.851us 10 10 100.00
all_partitions 20 20 100.00
flash_ctrl_rand_ops 823.160s 318.493us 20 20 100.00
error_mp 10 10 100.00
flash_ctrl_error_mp 506.880s 4968.681us 10 10 100.00
error_prog_win 10 10 100.00
flash_ctrl_error_prog_win 583.500s 3754.792us 10 10 100.00
error_prog_type 5 5 100.00
flash_ctrl_error_prog_type 1443.880s 1193.889us 5 5 100.00
error_read_seed 20 20 100.00
flash_ctrl_hw_read_seed_err 14.460s 310.670us 20 20 100.00
read_write_overflow 5 5 100.00
flash_ctrl_oversize_error 162.340s 25851.951us 5 5 100.00
flash_ctrl_disable 50 50 100.00
flash_ctrl_disable 23.280s 21.820us 50 50 100.00
flash_ctrl_connect 80 80 100.00
flash_ctrl_connect 17.760s 44.740us 80 80 100.00
stress_all 5 5 100.00
flash_ctrl_stress_all 794.620s 449.643us 5 5 100.00
secret_partition 130 130 100.00
flash_ctrl_hw_sec_otp 213.400s 50930.234us 50 50 100.00
flash_ctrl_otp_reset 126.290s 156.751us 80 80 100.00
isolation_partition 3 3 100.00
flash_ctrl_hw_rma 1607.650s 439735.364us 3 3 100.00
interrupts 99 100 99.00
flash_ctrl_intr_rd 224.260s 7745.348us 39 40 97.50
flash_ctrl_intr_wr 71.720s 2530.704us 10 10 100.00
flash_ctrl_intr_rd_slow_flash 281.070s 85885.237us 40 40 100.00
flash_ctrl_intr_wr_slow_flash 236.890s 112857.426us 10 10 100.00
invalid_op 20 20 100.00
flash_ctrl_invalid_op 78.250s 3792.381us 20 20 100.00
mid_op_rst 5 5 100.00
flash_ctrl_mid_op_rst 71.350s 4219.260us 5 5 100.00
double_bit_err 34 35 97.14
flash_ctrl_read_word_sweep_derr 20.460s 27.758us 5 5 100.00
flash_ctrl_ro_derr 128.610s 1730.259us 10 10 100.00
flash_ctrl_rw_derr 217.110s 8699.143us 10 10 100.00
flash_ctrl_derr_detect 172.440s 1248.433us 4 5 80.00
flash_ctrl_integrity 554.060s 11351.378us 5 5 100.00
single_bit_err 25 25 100.00
flash_ctrl_read_word_sweep_serr 23.830s 87.368us 5 5 100.00
flash_ctrl_ro_serr 112.030s 8128.565us 10 10 100.00
flash_ctrl_rw_serr 191.330s 24238.010us 10 10 100.00
singlebit_err_counter 5 5 100.00
flash_ctrl_serr_counter 71.180s 1003.693us 5 5 100.00
singlebit_err_address 5 5 100.00
flash_ctrl_serr_address 82.160s 4699.567us 5 5 100.00
scramble 62 62 100.00
flash_ctrl_wo 228.600s 55429.704us 20 20 100.00
flash_ctrl_write_word_sweep 9.670s 74.799us 1 1 100.00
flash_ctrl_read_word_sweep 12.360s 26.301us 1 1 100.00
flash_ctrl_ro 100.190s 2506.626us 20 20 100.00
flash_ctrl_rw 504.920s 5121.391us 20 20 100.00
filesystem_support 5 5 100.00
flash_ctrl_fs_sup 32.420s 1310.207us 5 5 100.00
rma_write_process_error 23 23 100.00
flash_ctrl_rma_err 826.640s 174627.100us 3 3 100.00
flash_ctrl_hw_prog_rma_wipe_err 261.680s 10020.003us 20 20 100.00
alert_test 10 10 100.00
flash_ctrl_alert_test 13.380s 91.234us 10 10 100.00
intr_test 10 10 100.00
flash_ctrl_intr_test 12.850s 55.179us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
flash_ctrl_tl_errors 20.790s 240.505us 25 25 100.00
tl_d_illegal_access 25 25 100.00
flash_ctrl_tl_errors 20.790s 240.505us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
flash_ctrl_csr_hw_reset 14.680s 96.946us 1 1 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
flash_ctrl_csr_aliasing 24.850s 882.119us 1 1 100.00
flash_ctrl_same_csr_outstanding 35.310s 66.715us 5 5 100.00
tl_d_partial_access 12 12 100.00
flash_ctrl_csr_hw_reset 14.680s 96.946us 1 1 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
flash_ctrl_csr_aliasing 24.850s 882.119us 1 1 100.00
flash_ctrl_same_csr_outstanding 35.310s 66.715us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 82.650s 265.764us 20 20 100.00
tl_intg_err 30 30 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
flash_ctrl_tl_intg_err 666.980s 784.188us 25 25 100.00
sec_cm_reg_bus_integrity 25 25 100.00
flash_ctrl_tl_intg_err 666.980s 784.188us 25 25 100.00
sec_cm_host_bus_integrity 25 25 100.00
flash_ctrl_tl_intg_err 666.980s 784.188us 25 25 100.00
sec_cm_mem_bus_integrity 6 6 100.00
flash_ctrl_rd_intg 34.560s 213.173us 3 3 100.00
flash_ctrl_wr_intg 12.780s 85.700us 3 3 100.00
sec_cm_scramble_key_sideload 50 50 100.00
flash_ctrl_smoke 151.890s 97.093us 50 50 100.00
sec_cm_lc_ctrl_intersig_mubi 260 260 100.00
flash_ctrl_otp_reset 126.290s 156.751us 80 80 100.00
flash_ctrl_disable 23.280s 21.820us 50 50 100.00
flash_ctrl_sec_info_access 82.750s 10409.318us 50 50 100.00
flash_ctrl_connect 17.760s 44.740us 80 80 100.00
sec_cm_ctrl_config_regwen 5 5 100.00
flash_ctrl_config_regwen 13.530s 23.070us 5 5 100.00
sec_cm_data_regions_config_regwen 5 5 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
sec_cm_data_regions_config_shadow 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
sec_cm_info_regions_config_regwen 5 5 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
sec_cm_info_regions_config_shadow 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
sec_cm_bank_config_regwen 5 5 100.00
flash_ctrl_csr_rw 15.670s 44.029us 5 5 100.00
sec_cm_bank_config_shadow 20 20 100.00
flash_ctrl_shadow_reg_errors 77.550s 70.175us 20 20 100.00
sec_cm_mem_ctrl_global_esc 50 50 100.00
flash_ctrl_disable 23.280s 21.820us 50 50 100.00
sec_cm_mem_ctrl_local_esc 6 6 100.00
flash_ctrl_rd_intg 34.560s 213.173us 3 3 100.00
flash_ctrl_access_after_disable 11.900s 179.111us 3 3 100.00
sec_cm_mem_addr_infection 3 3 100.00
flash_ctrl_host_addr_infection 19.800s 27.431us 3 3 100.00
sec_cm_mem_disable_config_mubi 50 50 100.00
flash_ctrl_disable 23.280s 21.820us 50 50 100.00
sec_cm_exec_config_redun 10 10 100.00
flash_ctrl_fetch_code 33.070s 664.851us 10 10 100.00
sec_cm_mem_scramble 20 20 100.00
flash_ctrl_rw 504.920s 5121.391us 20 20 100.00
sec_cm_mem_integrity 25 25 100.00
flash_ctrl_rw_serr 191.330s 24238.010us 10 10 100.00
flash_ctrl_rw_derr 217.110s 8699.143us 10 10 100.00
flash_ctrl_integrity 554.060s 11351.378us 5 5 100.00
sec_cm_rma_entry_mem_sec_wipe 3 3 100.00
flash_ctrl_hw_rma 1607.650s 439735.364us 3 3 100.00
sec_cm_ctrl_fsm_sparse 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
sec_cm_phy_fsm_sparse 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
sec_cm_phy_prog_fsm_sparse 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
sec_cm_ctr_redun 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
sec_cm_phy_arbiter_ctrl_redun 5 5 100.00
flash_ctrl_phy_arb_redun 20.020s 711.044us 5 5 100.00
sec_cm_phy_host_grant_ctrl_consistency 3 5 60.00
flash_ctrl_phy_host_grant_err 13.720s 30.160us 3 5 60.00
sec_cm_phy_ack_ctrl_consistency 5 5 100.00
flash_ctrl_phy_ack_consistency 14.000s 22.561us 5 5 100.00
sec_cm_fifo_ctr_redun 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 5 5 100.00
flash_ctrl_sec_cm 2461.660s 1453.503us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 32.120s 96.948us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 3 3 100.00
flash_ctrl_basic_rw 255.180s 1008.766us 3 3 100.00

Error Messages

   Test seed line log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: flash_ctrl_core_reg_block.op_status.err reset value: * 3 test runs
flash_ctrl_rw_evict 67567155850961477537738631335811591171902807544540057073078801171388372580445 108
UVM_INFO @ 73234.1 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
flash_ctrl_rw_evict 112785089930940375628519302250791648523909120827105531667655371665981409167876 108
UVM_INFO @ 37934.0 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
flash_ctrl_rw_evict 39089694444830756436243639701045927734506558961211183764990404537023465122306 108
UVM_INFO @ 49203.8 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '(!$isunknown((alert_tx.alert_p ^ alert_tx.alert_n)))' 2 test runs
flash_ctrl_phy_host_grant_err 35517018404684287358682100120946990257714837470897766497892750471828089406675 125
UVM_ERROR @ 10023.3 ns: (alert_esc_if.sv:211) [ASSERT FAILED] AlertKnown_A
UVM_INFO @ 10023.3 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
flash_ctrl_phy_host_grant_err 69824228803632206657927826261923843046023376948296208618760889058753500766761 125
UVM_ERROR @ 12264.9 ns: (alert_esc_if.sv:211) [ASSERT FAILED] AlertKnown_A
UVM_INFO @ 12264.9 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (flash_ctrl_otf_scoreboard.sv:435) [mon_tb_mem1] Check failed cfg.flash_ctrl_mem_vif[bank].data_mem_req == * (* [*] vs * [*]) 1 test run
flash_ctrl_derr_detect 27448472858330854104880364857699566840293692870735227995234921545830494120036 109
UVM_INFO @ 20242.6 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 1 test run
flash_ctrl_prog_reset 95424365172127268455635517508040406151364397057330075541251948423236360897373 None
UVM_ERROR (flash_ctrl_otf_scoreboard.sv:376) [rdata_comp_bank1] *: obs:exp *e3a6f_14320bd1:ffffffff_14320bd* mismatch!! 1 test run
flash_ctrl_intr_rd 8822530047882206797764954562548840581232282701121670151218955720683428561915 108
UVM_INFO @ 709222.0 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---