| V1 |
|
100.00% |
| V2 |
|
90.73% |
| V2S |
|
97.56% |
| V3 |
|
50.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 52.020s | 834.310us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| alert_handler_csr_hw_reset | 6.810s | 59.693us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| alert_handler_csr_rw | 11.230s | 973.362us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| alert_handler_csr_bit_bash | 261.640s | 5486.738us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| alert_handler_csr_aliasing | 224.050s | 14513.810us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 20.190s | 3660.077us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| alert_handler_csr_rw | 11.230s | 973.362us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 224.050s | 14513.810us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 25 | 25 | 100.00 | |||
| alert_handler_esc_alert_accum | 341.010s | 99596.786us | 25 | 25 | 100.00 | |
| esc_timeout | 50 | 50 | 100.00 | |||
| alert_handler_esc_intr_timeout | 69.880s | 5226.537us | 50 | 50 | 100.00 | |
| entropy | 24 | 25 | 96.00 | |||
| alert_handler_entropy | 2991.910s | 60789.482us | 24 | 25 | 96.00 | |
| sig_int_fail | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 75.910s | 1614.575us | 49 | 50 | 98.00 | |
| clk_skew | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 52.020s | 834.310us | 10 | 10 | 100.00 | |
| random_alerts | 10 | 10 | 100.00 | |||
| alert_handler_random_alerts | 73.240s | 1218.097us | 10 | 10 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 89.830s | 4196.367us | 50 | 50 | 100.00 | |
| ping_timeout | 27 | 50 | 54.00 | |||
| alert_handler_ping_timeout | 473.820s | 12178.134us | 27 | 50 | 54.00 | |
| lpg | 97 | 100 | 97.00 | |||
| alert_handler_lpg | 3370.210s | 266639.435us | 47 | 50 | 94.00 | |
| alert_handler_lpg_stub_clk | 3194.310s | 69348.957us | 50 | 50 | 100.00 | |
| stress_all | 49 | 50 | 98.00 | |||
| alert_handler_stress_all | 3713.470s | 76412.420us | 49 | 50 | 98.00 | |
| alert_handler_entropy_stress_test | 2 | 20 | 10.00 | |||
| alert_handler_entropy_stress | 23.590s | 1796.234us | 2 | 20 | 10.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 5.320s | 57.747us | 20 | 20 | 100.00 | |
| intr_test | 10 | 10 | 100.00 | |||
| alert_handler_intr_test | 2.560s | 18.416us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 29.130s | 1324.941us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 29.130s | 1324.941us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 6.810s | 59.693us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 11.230s | 973.362us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 224.050s | 14513.810us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 51.230s | 636.129us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 6.810s | 59.693us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 11.230s | 973.362us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 224.050s | 14513.810us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 51.230s | 636.129us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 322.840s | 4426.535us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 322.840s | 4426.535us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 322.840s | 4426.535us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 322.840s | 4426.535us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 1152.400s | 17199.233us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 98.650s | 1189.780us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| alert_handler_tl_intg_err | 98.650s | 1189.780us | 25 | 25 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 322.840s | 4426.535us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 52.020s | 834.310us | 10 | 10 | 100.00 | |
| sec_cm_alert_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 52.020s | 834.310us | 10 | 10 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 52.020s | 834.310us | 10 | 10 | 100.00 | |
| sec_cm_class_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 52.020s | 834.310us | 10 | 10 | 100.00 | |
| sec_cm_alert_intersig_diff | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 75.910s | 1614.575us | 49 | 50 | 98.00 | |
| sec_cm_lpg_intersig_mubi | 47 | 50 | 94.00 | |||
| alert_handler_lpg | 3370.210s | 266639.435us | 47 | 50 | 94.00 | |
| sec_cm_esc_intersig_diff | 49 | 50 | 98.00 | |||
| alert_handler_sig_int_fail | 75.910s | 1614.575us | 49 | 50 | 98.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 24 | 25 | 96.00 | |||
| alert_handler_entropy | 2991.910s | 60789.482us | 24 | 25 | 96.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 24 | 25 | 96.00 | |||
| alert_handler_entropy | 2991.910s | 60789.482us | 24 | 25 | 96.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 32.530s | 1115.487us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 5 | 10 | 50.00 | |||
| alert_handler_stress_all_with_rand_reset | 340.280s | 14007.618us | 5 | 10 | 50.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 24 test runs | |||
| alert_handler_ping_timeout | 44839595747440873313734742089168056031411422957031525739052991360108390902355 | 93 |
UVM_INFO @ 2040659078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 66169079724041524725357532302279759054826014952862886280556649067158754432113 | 132 |
UVM_INFO @ 37039501539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 86022343283568709063698413520753591349877323464012923205912657822153817267964 | 87 |
UVM_INFO @ 1382424896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 53958463793620477068493860556408555907284574938185814171408895306165803004136 | 84 |
UVM_INFO @ 1337436790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 46453460379019571360468557458720909793249517090902389134135988987898430997057 | 123 |
UVM_INFO @ 34628638753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 67557287223321039153123439509118427468222456017279965173680653565083712633049 | 80 |
UVM_INFO @ 19336197231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 37740919825500136548959499047119701797417679756195861947802543627517091843694 | 87 |
UVM_INFO @ 1173998437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 43995207532187887588761900024108001598100747559219731979432106033219070649583 | 124 |
UVM_INFO @ 11753348869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 35822619169730372512074435212031647851438398945230641312386476063829802236449 | 102 |
UVM_INFO @ 3414337860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 43697234421184861087401199976832928175879715872012664044533250681801970207146 | 141 |
UVM_INFO @ 50894630067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 1685228853298223836475413279105708402267956883456367382077133174068140612298 | 87 |
UVM_INFO @ 6871784310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 75370268022678466548727892473563754424984587807894922739776070396108383695223 | 90 |
UVM_INFO @ 3395609166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 60463119203478799013496605296884604999154345761021082277231229703741134077121 | 90 |
UVM_INFO @ 1897286313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 99533447419642713291077418295221580659627736515482947359092228208122640439749 | 114 |
UVM_INFO @ 4049646964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 11287848526009425130395402623427864200410125108435351028487178193162634957170 | 150 |
UVM_INFO @ 24601994178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 77676012294889318738573929692320247682911644137311066469925309107296333240048 | 120 |
UVM_INFO @ 4642798128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 54613440811540883783499287934006725800675227165872972324682398530441599315375 | 82 |
UVM_INFO @ 102046559365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 40069457146508900201397040973136832179534092714708848709100479946346688242818 | 87 |
UVM_INFO @ 10664314268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 883985065037133769675724467521767801385535952808385239411214088325553125849 | 96 |
UVM_INFO @ 8962821062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 4476531252512293245440231498509913333113388130603603655568110395599011363176 | 114 |
UVM_INFO @ 5426972923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 78628718853949413241530239558334079766487631322415499542352629778462529289186 | 117 |
UVM_INFO @ 49412804303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 61699965037553345225388366153049211582289615937210529881885250990894281909014 | 99 |
UVM_INFO @ 9566679395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 34813979636924679546408674494505581164429834732630638819365080188242149872576 | 82 |
UVM_INFO @ 49600073266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 66808888985707140147121577611818279101039515216597978167222604277203127668353 | 90 |
UVM_INFO @ 1211783502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 18 test runs | |||
| alert_handler_entropy_stress | 24589789781692971765983701317792055624938533362068818404888497551914852820805 | 158 |
UVM_INFO @ 344188581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 33370421025274515266428452065913431986684251140869572357263680734102224005196 | 160 |
UVM_INFO @ 593821127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 105816117471485224855050094620277536041949153050661865150832896971249644998129 | 198 |
UVM_INFO @ 103802767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 115261716410913253755729732419146561366656392557044301172160565732110551939340 | 174 |
UVM_INFO @ 882776866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 58226641549147041437768959885240180262326438638441861931193904441503210228304 | 198 |
UVM_INFO @ 215683558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 10350739051606267071350591108882287489297467829731677562759526670752900567027 | 200 |
UVM_INFO @ 442504260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 84745955958829214795520772875960744498683720004099108837329881454594075369810 | 202 |
UVM_INFO @ 1796234321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 34166932078844139995966664075222051663974643311055305944224048938556370507427 | 198 |
UVM_INFO @ 414288632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 104973883458124085995205996642520770558880742893505481070480376115670703696878 | 198 |
UVM_INFO @ 426221568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 45875288077110862036887117409177322104839146042640503143164729870060779397937 | 206 |
UVM_INFO @ 121821940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 87922563521037808346186547126624507135633938699413204842604334022448166016754 | 174 |
UVM_INFO @ 442412160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 36638758216362617720808910256721139320404595248860633252818870916133685383504 | 204 |
UVM_INFO @ 1344611687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 111047245074703297318324415560914207600202255998542307804051216697124506731563 | 204 |
UVM_INFO @ 75916703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 89000725186000835299463567697679523021988808502172238380792510059845187158384 | 194 |
UVM_INFO @ 572807735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 4669849099404089352502143930830656970599670370261761588722405177157643413302 | 158 |
UVM_INFO @ 197091849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 114482044714296474371816121099413183010459418750088670516617252876627085807988 | 206 |
UVM_INFO @ 193514202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 34165444600433785931424749929549409392635479918518512497125138385503698194902 | 202 |
UVM_INFO @ 368821929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 23128676468407703135700598501706579809226469418075848190655498541161009695690 | 182 |
UVM_INFO @ 1693391559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 5 test runs | |||
| alert_handler_stress_all_with_rand_reset | 11025163371652223731670945271422102337839807676171815790954547078797591037669 | 83 |
UVM_INFO @ 111226197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 86416951863546014498683356669508286491500852209760572033944657179560570994932 | 119 |
UVM_INFO @ 1617702015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 98727847188138986331250822987287048393601811243908593852356605706442029494815 | 115 |
UVM_INFO @ 1586908551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 29664187029891538784419012243470059326150895897553553189140193803662793492446 | 93 |
UVM_INFO @ 3427992191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 13122852290775328031170441701455388319236815213729307488437288747047807800254 | 87 |
UVM_INFO @ 559516805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) | 2 test runs | |||
| alert_handler_sig_int_fail | 2468326655189125878273566759210059398507413305713894323084259389481349188717 | 95 |
UVM_INFO @ 1057898644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| alert_handler_stress_all | 17262622775942423614081592532804390641067104308361118912225155483066279954096 | 101 |
UVM_INFO @ 4455482475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (alert_handler_scoreboard.sv:608) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. | 2 test runs | |||
| alert_handler_ping_timeout | 25596623872437757423254825512015245641699626273072478237989268606084764189424 | 80 |
UVM_INFO @ 211258582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| alert_handler_ping_timeout | 20732327753501750107938486973577984832374380048303813356009748006398939137991 | 80 |
UVM_INFO @ 693258810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (alert_handler_scoreboard.sv:490) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: alert_handler_reg_block.loc_alert_cause_* | 1 test run | |||
| alert_handler_entropy | 40315585359305810119060097838594317884257471671432576211264053695466475454931 | 81 |
UVM_INFO @ 54680438622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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