Simulation Results: gpio

 
27/06/2026 02:42:03 DVSim: v1.49.0 sha: 1134d70 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 99.00 %
  • code
  • 98.27 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.94 %
Validation stages
V1
100.00%
V2
94.90%
V2S
100.00%
V3
40.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.640s 82.015us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.630s 88.668us 10 10 100.00
gpio_smoke_en_cdc_prim 1.970s 443.740us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.810s 99.537us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.920s 83.614us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.960s 46.664us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.440s 430.000us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.300s 36.103us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.610s 24.607us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.960s 46.664us 5 5 100.00
gpio_csr_aliasing 1.300s 36.103us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.730s 142.784us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.630s 275.739us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.260s 255.975us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.710s 224.553us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.660s 185.378us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.080s 195.919us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 21.420s 2431.260us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 4.870s 535.739us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.380s 265.563us 10 10 100.00
stress_all 2 10 20.00
gpio_stress_all 63.480s 5789.588us 2 10 20.00
alert_test 10 10 100.00
gpio_alert_test 0.940s 14.841us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.950s 80.703us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.160s 335.041us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.160s 335.041us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.960s 46.664us 5 5 100.00
gpio_same_csr_outstanding 1.010s 41.972us 5 5 100.00
gpio_csr_aliasing 1.300s 36.103us 1 1 100.00
gpio_csr_hw_reset 0.920s 83.614us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.960s 46.664us 5 5 100.00
gpio_same_csr_outstanding 1.010s 41.972us 5 5 100.00
gpio_csr_aliasing 1.300s 36.103us 1 1 100.00
gpio_csr_hw_reset 0.920s 83.614us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.830s 264.481us 25 25 100.00
gpio_sec_cm 1.310s 163.086us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.830s 264.481us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 8 10 80.00
gpio_rand_straps 0.910s 37.276us 8 10 80.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 11.530s 767.641us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 10 test runs
gpio_rand_straps 113719844874254135931665888572401102071299371531292507793970193370656911327928 75
UVM_INFO @ 1254162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 72703974786832076512631794965936951990635198509320879038357060693606833371138 1369
UVM_INFO @ 5789587988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 9945370894440386989936056809882047979339245352209251441314376202473717810692 286
UVM_INFO @ 3544764296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 13228577988232432534338475260925203145476360678250808673803128972582422563952 327
UVM_INFO @ 1354125925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 110055874999303295528904405932546685770935305829110518487681775774961707708574 651
UVM_INFO @ 3349175481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 28105420380469037616857312546122770661406029810523710171848390317910691439370 75
UVM_INFO @ 2667560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 557015595691643723614670980587807448054857268353596014463168127923398421830 615
UVM_INFO @ 6427400245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 14833154872159897051318243944072062106651442661195084163507155586693979184986 636
UVM_INFO @ 2659177488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 3992889938950014862260126015571587063494554207622268162911270567294696531185 81
UVM_INFO @ 865958228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 37667900917899342867682675829716544049986831815557510815650225256506548606850 225
UVM_INFO @ 1119411200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 7 test runs
gpio_stress_all_with_rand_reset 92788200996574256523658006900209847366672658302878876618506688430426895249342 82
UVM_INFO @ 11141687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63667086883151312365175105683473517453600517111679243870283146902885250292441 137
UVM_INFO @ 368560713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 63206917352936618145933965040901086276093651482321943230567321089865714746336 460
UVM_INFO @ 767640879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40264721953720528042275147486866049041698161471242525498763251303930994752112 80
UVM_INFO @ 140641481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 46495426614411354646031661918482315711288319520136430602225038654028145708899 80
UVM_INFO @ 81868530 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56499481490054788681236333399175845697629749402451425390110149640469176711885 80
UVM_INFO @ 1645429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3480624061771240159055667371856176661143840940090464436025832223920014586874 80
UVM_INFO @ 7491605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 3 test runs
gpio_stress_all_with_rand_reset 4981193066541261023986980128338055093795489581984868181304236309062223715497 78
UVM_INFO @ 2295374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25239992166891178628438248815283260936234186698492161163503308225557802612439 166
UVM_INFO @ 1844407266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82984522048056245630802313708960993471150021869224596465170006419192982909700 78
UVM_INFO @ 587683126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---