| V1 |
|
100.00% |
| V2 |
|
96.79% |
| V2S |
|
91.43% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 2.000s | 114.606us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 11.000s | 426.605us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 23.000s | 97.233us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 7.000s | 77.958us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 25.000s | 153.249us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 28.000s | 150.585us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 15.000s | 66.145us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 7.000s | 77.958us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 28.000s | 150.585us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 11.000s | 426.605us | 10 | 10 | 100.00 | |
| aes_config_error | 29.000s | 178.751us | 50 | 50 | 100.00 | |
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 11.000s | 426.605us | 10 | 10 | 100.00 | |
| aes_config_error | 29.000s | 178.751us | 50 | 50 | 100.00 | |
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| aes_b2b | 31.000s | 283.482us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| multi_message | 95 | 95 | 100.00 | |||
| aes_smoke | 11.000s | 426.605us | 10 | 10 | 100.00 | |
| aes_config_error | 29.000s | 178.751us | 50 | 50 | 100.00 | |
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| aes_alert_reset | 31.000s | 175.272us | 25 | 25 | 100.00 | |
| failure_test | 85 | 85 | 100.00 | |||
| aes_man_cfg_err | 4.000s | 88.244us | 10 | 10 | 100.00 | |
| aes_config_error | 29.000s | 178.751us | 50 | 50 | 100.00 | |
| aes_alert_reset | 31.000s | 175.272us | 25 | 25 | 100.00 | |
| trigger_clear_test | 10 | 10 | 100.00 | |||
| aes_clear | 29.000s | 103.479us | 10 | 10 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 13.000s | 500.595us | 1 | 1 | 100.00 | |
| reset_recovery | 25 | 25 | 100.00 | |||
| aes_alert_reset | 31.000s | 175.272us | 25 | 25 | 100.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| aes_sideload | 6.000s | 111.015us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 7.000s | 292.414us | 10 | 10 | 100.00 | |
| stress_all | 3 | 10 | 30.00 | |||
| aes_stress_all | 51.000s | 8875.449us | 3 | 10 | 30.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 28.000s | 205.093us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 83.482us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 83.482us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 23.000s | 97.233us | 1 | 1 | 100.00 | |
| aes_csr_rw | 7.000s | 77.958us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 28.000s | 150.585us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 2.000s | 96.585us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 23.000s | 97.233us | 1 | 1 | 100.00 | |
| aes_csr_rw | 7.000s | 77.958us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 28.000s | 150.585us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 2.000s | 96.585us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 5 | 10 | 50.00 | |||
| aes_reseed | 6.000s | 257.554us | 5 | 10 | 50.00 | |
| fault_inject | 594 | 660 | 90.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| shadow_reg_update_error | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| shadow_reg_read_clear_staged_value | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| shadow_reg_storage_error | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| shadowed_reset_glitch | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| shadow_reg_update_error_with_csr_rw | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 4.000s | 685.105us | 19 | 20 | 95.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 6.000s | 841.603us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 6.000s | 1603.121us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 6.000s | 1603.121us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 25 | 25 | 100.00 | |||
| aes_alert_reset | 31.000s | 175.272us | 25 | 25 | 100.00 | |
| sec_cm_main_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| sec_cm_gcm_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| sec_cm_main_config_sparse | 135 | 145 | 93.10 | |||
| aes_smoke | 11.000s | 426.605us | 10 | 10 | 100.00 | |
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| aes_alert_reset | 31.000s | 175.272us | 25 | 25 | 100.00 | |
| aes_core_fi | 69.000s | 10027.854us | 90 | 100 | 90.00 | |
| sec_cm_gcm_config_sparse | 150 | 160 | 93.75 | |||
| aes_config_error | 29.000s | 178.751us | 50 | 50 | 100.00 | |
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| aes_core_fi | 69.000s | 10027.854us | 90 | 100 | 90.00 | |
| sec_cm_aux_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 89.997us | 19 | 20 | 95.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 3.000s | 147.127us | 10 | 10 | 100.00 | |
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| aes_sideload | 6.000s | 111.015us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 147.127us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 147.127us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 147.127us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 147.127us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 147.127us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 6.000s | 151.837us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| sec_cm_main_fsm_redun | 618 | 685 | 90.22 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| aes_ctr_fi | 61.000s | 0.000us | 24 | 25 | 96.00 | |
| sec_cm_cipher_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| sec_cm_cipher_fsm_redun | 594 | 660 | 90.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| sec_cm_cipher_ctr_redun | 323 | 350 | 92.29 | |||
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| sec_cm_ctr_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| sec_cm_ctr_fsm_redun | 295 | 335 | 88.06 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_ctr_fi | 61.000s | 0.000us | 24 | 25 | 96.00 | |
| sec_cm_ghash_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| sec_cm_ctrl_sparse | 618 | 685 | 90.22 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| aes_ctr_fi | 61.000s | 0.000us | 24 | 25 | 96.00 | |
| sec_cm_main_fsm_global_esc | 25 | 25 | 100.00 | |||
| aes_alert_reset | 31.000s | 175.272us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_local_esc | 618 | 685 | 90.22 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| aes_ctr_fi | 61.000s | 0.000us | 24 | 25 | 96.00 | |
| sec_cm_cipher_fsm_local_esc | 618 | 685 | 90.22 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| aes_ctr_fi | 61.000s | 0.000us | 24 | 25 | 96.00 | |
| sec_cm_ctr_fsm_local_esc | 295 | 335 | 88.06 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_ctr_fi | 61.000s | 0.000us | 24 | 25 | 96.00 | |
| sec_cm_ghash_fsm_local_esc | 0 | 10 | 0.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| sec_cm_data_reg_local_esc | 594 | 660 | 90.00 | |||
| aes_fi | 7.000s | 334.061us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 271 | 300 | 90.33 | |
| aes_cipher_fi | 60.000s | 10003.484us | 323 | 350 | 92.29 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 27.000s | 1987.954us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 27 test runs | |||
| aes_cipher_fi | 62220406073634719588632099128790440148226417843554504841194821803013017500797 | 149 |
UVM_INFO @ 10004939692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 48449216664962730349963056933434233337554550480137812934447334282551256131172 | 147 |
UVM_INFO @ 10005758328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 2205483212638083724191002674687681318106902760157239757189548360049641241433 | 147 |
UVM_INFO @ 10008556404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 13891918318614676735364954734460587877214198239628479524871920915452496600599 | 142 |
UVM_INFO @ 10035617264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 37008999220681495368658633103233113337524405204577444715532491047859879337829 | 142 |
UVM_INFO @ 10011082908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 46747219156541336632529078878247324763749145566223662178002673213160006076153 | 151 |
UVM_INFO @ 10008656330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 89356335424221936022241544737679522521429853880884538498773716223081132930746 | 143 |
UVM_INFO @ 10004151772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 110147495927449602899703894178515358699406916313135615390719045376999072805892 | 147 |
UVM_INFO @ 10008309508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 93636668503000126653327300238816971824014161692653511403263379170821765767706 | 142 |
UVM_INFO @ 10032372788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 14899893789081296735027922224727555036816596161974615296927858397248688855860 | 145 |
UVM_INFO @ 10057376653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 86517225804387386576282354940907322430787446690399072187257737610708482297603 | 141 |
UVM_INFO @ 10003484456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 91955762116057504494482916164677921414702745079006776047466025035092512168255 | 143 |
UVM_INFO @ 10003879084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 63306757187291830225686216223403515325268949586874652626080608873578241751990 | 144 |
UVM_INFO @ 10005067588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 4516223540623527046695496361333307752502123533755809038990616367284949749970 | 155 |
UVM_INFO @ 10017113531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 65163558962338375986731762443098589630102322470264278444615542876769098174731 | 147 |
UVM_INFO @ 10010741504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 12632236047779367872788943322941287412973415625703708736351574744846669305575 | 152 |
UVM_INFO @ 10006406804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 93607883024394408819822099657841239828253673085494250934979399492813992002866 | 147 |
UVM_INFO @ 10003678168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 88262367021972394388996149889306450321999310455557566126057328741747858689929 | 152 |
UVM_INFO @ 10008910451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 42176063965775846656787559785071100724566916100994432536164842162481810644012 | 145 |
UVM_INFO @ 10009197764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 30357054784919477856504604505356397024124050010088119060363688609654391653601 | 138 |
UVM_INFO @ 10063765368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 35258227065519432027204861956143433938031520488343012594043793198607513756939 | 148 |
UVM_INFO @ 10011418872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 93311168954845124852009661911512889139954790625105133529080281833734868476547 | 142 |
UVM_INFO @ 10015954403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 102192249214161144839408853873717302963065724858050928422893729052287564203436 | 143 |
UVM_INFO @ 10005097336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 95453255170084772406411771760903567339620727696166599652190173368669813895387 | 139 |
UVM_INFO @ 10030717285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 7443391065731680321577511126946055139194553633551500438145557809755662451800 | 150 |
UVM_INFO @ 10014894991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 16932865945349407006728472225189482392379617212614369826392327342719445793092 | 141 |
UVM_INFO @ 10015724104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 34478062484932574534736399063668366937069509767376167407497145762397076040367 | 153 |
UVM_INFO @ 10020133376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 21 test runs | |||
| aes_control_fi | 94970480013222377504395124866694712272320751591169653388611700789231832611535 | 149 |
UVM_INFO @ 10003334162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 82244635639556722727658304701388742084191534011532500797225445820381893726781 | 146 |
UVM_INFO @ 10013600013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 79479591313073455350660726566647693397674968689417300129102937778541891974668 | 150 |
UVM_INFO @ 10019085595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 37825848573446077966664916783283154453340160855398248576899742272174464837358 | 152 |
UVM_INFO @ 10008516878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 53266003735650581162596319574025181271855888219750615665362423239129990189221 | 141 |
UVM_INFO @ 10009288600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 40679495515722042470846851071665273890795939685472513330216925929078636750371 | 150 |
UVM_INFO @ 10017888685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 91868995898745275111114409336786377407872252875494480241034368146300077324172 | 136 |
UVM_INFO @ 10007536198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 67950719212827735801359027440517367622188919460894139988294166313359073089977 | 149 |
UVM_INFO @ 10031543305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 27822939222862783796438698337798474636307508860772889203826475904776714324592 | 147 |
UVM_INFO @ 10305217099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 55667754260453883655288430640542180962499552373410106883175370665383317597242 | 139 |
UVM_INFO @ 10013711244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 3208954804241462486229984947643501071446857295646475903786896951314543233245 | 139 |
UVM_INFO @ 10012782821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 91697749570873475583574722458569163467355763462622142849130409113628149675043 | 146 |
UVM_INFO @ 10004088973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 78687108667486340652188755291961887054525147722270492742766756771850905399553 | 145 |
UVM_INFO @ 10006974206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 77397534669878894473899334768506303041057262937814588936473194669089525876264 | 142 |
UVM_INFO @ 10011934418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 91813615182180811206465399650112217663663217980722409075542278191659499115070 | 146 |
UVM_INFO @ 10020106213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 2662212675454611625564866747409253404329633109098927369039781690988359528483 | 142 |
UVM_INFO @ 10012862255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 44226013492660818230585672158184667143365362884021827377137999929920007797323 | 151 |
UVM_INFO @ 10157195148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 25856568406248531898575506334531625002825332667007022918541752131304878911390 | 147 |
UVM_INFO @ 10011743164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 1731003391910336796434657806165769126513802480897898636838749794547811373546 | 148 |
UVM_INFO @ 10014946316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 114738637922458596511090922726366102571371743277731326324209395286235586498974 | 149 |
UVM_INFO @ 10013259287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 6300559808433812621438616763568468091721024087767332655496884787490608716697 | 142 |
UVM_INFO @ 10003999754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 16 test runs | |||
| aes_stress_all | 28175422836232349054555418357540666725903606069576727667098985581456368964891 | 40000 |
UVM_INFO @ 302171578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 27209395810041097944470072358370380709824267553737342047973997800130634491578 | 6706 |
UVM_INFO @ 96592018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 35355277641576115265534918360023751686361237521073307750128098444315890480133 | 35917 |
UVM_INFO @ 1334342808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 85072836316973905614014098681970887342535876493700489532363208460654270568179 | 270 |
UVM_INFO @ 304500971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 14605272970940506070194563813893685542473502282078115889297711621589292284246 | 930 |
UVM_INFO @ 1987953623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 108800433396422109601136420683550969798101117209951356196420413275560308048079 | 134647 |
UVM_INFO @ 1059558809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 91473680872400115385720316095776607413704561227115825400359706089088187014555 | 247 |
UVM_INFO @ 2016908618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 83051739292997787791498116494808217884423982638717038665621122467639943123761 | 2437 |
UVM_INFO @ 275719014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 26251459495547619218091446114648092242152348162596928836159664485774519411004 | 12863 |
UVM_INFO @ 163973175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 89209336676419479489999686906638918540866580531107978512609841682183782428340 | 17475 |
UVM_INFO @ 842091106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 81325465941239350185831035178642806675571854678307178930104427113868035152439 | 6033 |
UVM_INFO @ 131298076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 74098719479042768316980519604404429325909228063379016670342657539375043064159 | 7591 |
UVM_INFO @ 111051520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 78504624224285254766689150464668388556754135638747249719101526908898591971182 | 3917 |
UVM_INFO @ 46182322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 18791205979380352998791473866279339947590239934577888575991379256912262939347 | 18851 |
UVM_INFO @ 592173975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 81077480699893190010542162622602081094015740673474748934355989131408271882586 | 314 |
UVM_INFO @ 3804825294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 113907017911700951314126235376638504963072783957262298596929990660135710950709 | 274 |
UVM_INFO @ 205703687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] | 11 test runs | |||
| aes_fi | 30099909670287059555749482493726014247978717091892572657575629605953674190096 | 23732 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 47611719578030841573565141312113261973140081331906434619673032254096993115102 | 12917 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 4519831560065915806836352606345430976521382273126082265235412893707064313867 | 7718 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 96027842944184200731858628256489666255178039800118908830810894174092734340080 | 19634 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 5205942254919562585741090735581254426289896051174908872924524964041355497357 | 12922 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 85978603702855229300794192652463391556323762029012143780954605958164751234123 | 15550 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 115754702611057147431221077190186395936616547285743073755824504364608295226307 | 19208 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 108804519049271322010833111252868672880413134423736121072159816933343207401308 | 4676 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 100151344324879361420336210252667577606793686798410783741316945829166460568148 | 15833 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 71106438272509200174943741996959470176434890932982908905127602593476103945543 | 23939 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_stress_all | 60415160139210933135437495092012883759000954103781428095583367692244313986122 | 37016 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 2
----| Seen: 1
----| Expected corrupted: 0
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 10 test runs | |||
| aes_core_fi | 24600869514464195155823288579647178807735400739951384512991644574667470674405 | 146 |
UVM_INFO @ 10005907939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 97297450873820672813518801186938352743698550696052877963939315670090409181423 | 142 |
UVM_INFO @ 10022264965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 66465253677242602810326605940700170113321906079692008535479113755167854851382 | 147 |
UVM_INFO @ 10015477488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 16777531928473852173533290860861524922905919779311991674654218367321725947959 | 141 |
UVM_INFO @ 10004967667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 87508979226340335417482324020265720982577716764387524847555860956073729837113 | 145 |
UVM_INFO @ 10003032538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 77997270099126197534841481244669391771820749260903151256382626922782024127535 | 149 |
UVM_INFO @ 10009107941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 59066318952529830384507063637383188471060935053531485042919428718188091308768 | 152 |
UVM_INFO @ 10011180292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 37353929628688311518321824239471059750588120573823185690262358504433694657795 | 144 |
UVM_INFO @ 10027854008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 6535302752610290896672703189849299050182884418490510304871921922071035346401 | 146 |
UVM_INFO @ 10027483834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 18734821375645473766223707037915781556768957193794217438543070108198582515765 | 146 |
UVM_INFO @ 10017253472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | 9 test runs | |||
| aes_control_fi | 94069390359764653135581599353315052987100965421072018521330436551488048037271 | None | ||
| aes_ctr_fi | 34756470434474660628896149793924258195695395818236771708950370071496023931668 | None | ||
| aes_control_fi | 82713599642506709895671177402631855550441971970121149237846889977173856727863 | None | ||
| aes_control_fi | 9848293005065568344156157380194372322738995883057093331443746809271962247666 | None | ||
| aes_control_fi | 72996487947708552899325847487663497545522817689880824302424586329982400453407 | None | ||
| aes_control_fi | 1549522983921713255896094088127128752501258470604843977232428302438276806066 | None | ||
| aes_control_fi | 66365814127080265416642099900863812474323119077990857876100039433264127470182 | None | ||
| aes_control_fi | 71184659824067288540433365507492689418657017832897486542920840647692098295787 | None | ||
| aes_control_fi | 33436003689547590233631265408346057153311287895358311495499625349367221932267 | None | ||
| UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) | 2 test runs | |||
| aes_stress_all_with_rand_reset | 80596375436215222680193846592411048393279820175828718818667051725667303073167 | 294 |
UVM_INFO @ 213380057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 66596713206449705448004524044430438961946984233642676761873960966691704463825 | 135 |
UVM_INFO @ 19946532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: aes_reg_block_extended.ctrl_shadowed reset value: * | 2 test runs | |||
| aes_shadow_reg_errors | 45879362250302062366466518353298912385850745001860264443136039471336394745542 | 106 |
UVM_INFO @ 3137440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_shadow_reg_errors_with_csr_rw | 60069631970740639552769425670876837618254017202912268654688966130312275677051 | 107 |
UVM_INFO @ 459646320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 2 test runs | |||
| aes_stress_all_with_rand_reset | 92030258039100395666520954553063869831846298590639896989501233045435853461417 | 109 |
UVM_INFO @ 7777658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 13964767745784187438720381488915654252699403726933049547644433461150539051101 | 109 |
UVM_INFO @ 4762153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 69262667414288401427772095809282528450711594833495898824067180051388864700803 | 111 |
UVM_INFO @ 23758131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|