Simulation Results: aes/unmasked

 
04/07/2026 02:41:51 DVSim: v1.49.0 sha: 98a020b json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 96.07 %
  • code
  • 92.97 %
  • assert
  • 97.92 %
  • func
  • 97.32 %
  • block
  • 93.96 %
  • line
  • 95.22 %
  • branch
  • 87.58 %
  • toggle
  • 97.99 %
  • FSM
  • 91.11 %
Validation stages
V1
100.00%
V2
95.87%
V2S
90.20%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 1.000s 60.680us 1 1 100.00
smoke 10 10 100.00
aes_smoke 3.000s 59.473us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 58.345us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 2.000s 68.699us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 8.000s 2267.970us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 141.106us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 111.637us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 2.000s 68.699us 5 5 100.00
aes_csr_aliasing 3.000s 141.106us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 3.000s 59.473us 10 10 100.00
aes_config_error 3.000s 119.943us 50 50 100.00
aes_stress 4.000s 84.490us 10 10 100.00
key_length 70 70 100.00
aes_smoke 3.000s 59.473us 10 10 100.00
aes_config_error 3.000s 119.943us 50 50 100.00
aes_stress 4.000s 84.490us 10 10 100.00
back2back 35 35 100.00
aes_stress 4.000s 84.490us 10 10 100.00
aes_b2b 7.000s 208.383us 25 25 100.00
backpressure 10 10 100.00
aes_stress 4.000s 84.490us 10 10 100.00
multi_message 94 95 98.95
aes_smoke 3.000s 59.473us 10 10 100.00
aes_config_error 3.000s 119.943us 50 50 100.00
aes_stress 4.000s 84.490us 10 10 100.00
aes_alert_reset 4.000s 248.093us 24 25 96.00
failure_test 84 85 98.82
aes_man_cfg_err 3.000s 69.580us 10 10 100.00
aes_config_error 3.000s 119.943us 50 50 100.00
aes_alert_reset 4.000s 248.093us 24 25 96.00
trigger_clear_test 8 10 80.00
aes_clear 4.000s 404.982us 8 10 80.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 394.758us 1 1 100.00
reset_recovery 24 25 96.00
aes_alert_reset 4.000s 248.093us 24 25 96.00
stress 10 10 100.00
aes_stress 4.000s 84.490us 10 10 100.00
sideload 20 20 100.00
aes_stress 4.000s 84.490us 10 10 100.00
aes_sideload 3.000s 105.155us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 4.000s 178.755us 10 10 100.00
stress_all 4 10 40.00
aes_stress_all 10800.000s 0.000us 4 10 40.00
alert_test 10 10 100.00
aes_alert_test 2.000s 107.680us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 4.000s 216.173us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 4.000s 216.173us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 1.000s 58.345us 1 1 100.00
aes_csr_rw 2.000s 68.699us 5 5 100.00
aes_csr_aliasing 3.000s 141.106us 1 1 100.00
aes_same_csr_outstanding 3.000s 85.195us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 1.000s 58.345us 1 1 100.00
aes_csr_rw 2.000s 68.699us 5 5 100.00
aes_csr_aliasing 3.000s 141.106us 1 1 100.00
aes_same_csr_outstanding 3.000s 85.195us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 8 10 80.00
aes_reseed 5.000s 189.872us 8 10 80.00
fault_inject 579 660 87.73
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
shadow_reg_update_error 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
shadow_reg_read_clear_staged_value 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
shadow_reg_storage_error 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
shadowed_reset_glitch 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 122.415us 20 20 100.00
tl_intg_err 30 30 100.00
aes_sec_cm 5.000s 706.857us 5 5 100.00
aes_tl_intg_err 4.000s 426.591us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 4.000s 426.591us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 24 25 96.00
aes_alert_reset 4.000s 248.093us 24 25 96.00
sec_cm_main_config_shadow 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
sec_cm_gcm_config_shadow 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
sec_cm_main_config_sparse 135 145 93.10
aes_smoke 3.000s 59.473us 10 10 100.00
aes_stress 4.000s 84.490us 10 10 100.00
aes_alert_reset 4.000s 248.093us 24 25 96.00
aes_core_fi 206.000s 10012.181us 91 100 91.00
sec_cm_gcm_config_sparse 151 160 94.38
aes_config_error 3.000s 119.943us 50 50 100.00
aes_stress 4.000s 84.490us 10 10 100.00
aes_core_fi 206.000s 10012.181us 91 100 91.00
sec_cm_aux_config_shadow 17 20 85.00
aes_shadow_reg_errors 20.000s 10023.851us 17 20 85.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 87.918us 10 10 100.00
aes_stress 4.000s 84.490us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 4.000s 84.490us 10 10 100.00
aes_sideload 3.000s 105.155us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 87.918us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 87.918us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 87.918us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 87.918us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 87.918us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 4.000s 84.490us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 4.000s 84.490us 10 10 100.00
sec_cm_main_fsm_sparse 0 10 0.00
aes_fi 4.000s 369.592us 0 10 0.00
sec_cm_main_fsm_redun 604 685 88.18
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
aes_ctr_fi 3.000s 104.085us 25 25 100.00
sec_cm_cipher_fsm_sparse 0 10 0.00
aes_fi 4.000s 369.592us 0 10 0.00
sec_cm_cipher_fsm_redun 579 660 87.73
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
sec_cm_cipher_ctr_redun 313 350 89.43
aes_cipher_fi 61.000s 0.000us 313 350 89.43
sec_cm_ctr_fsm_sparse 0 10 0.00
aes_fi 4.000s 369.592us 0 10 0.00
sec_cm_ctr_fsm_redun 291 335 86.87
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_ctr_fi 3.000s 104.085us 25 25 100.00
sec_cm_ghash_fsm_sparse 0 10 0.00
aes_fi 4.000s 369.592us 0 10 0.00
sec_cm_ctrl_sparse 604 685 88.18
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
aes_ctr_fi 3.000s 104.085us 25 25 100.00
sec_cm_main_fsm_global_esc 24 25 96.00
aes_alert_reset 4.000s 248.093us 24 25 96.00
sec_cm_main_fsm_local_esc 604 685 88.18
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
aes_ctr_fi 3.000s 104.085us 25 25 100.00
sec_cm_cipher_fsm_local_esc 604 685 88.18
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
aes_ctr_fi 3.000s 104.085us 25 25 100.00
sec_cm_ctr_fsm_local_esc 291 335 86.87
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_ctr_fi 3.000s 104.085us 25 25 100.00
sec_cm_ghash_fsm_local_esc 0 10 0.00
aes_fi 4.000s 369.592us 0 10 0.00
sec_cm_data_reg_local_esc 579 660 87.73
aes_fi 4.000s 369.592us 0 10 0.00
aes_control_fi 61.000s 0.000us 266 300 88.67
aes_cipher_fi 61.000s 0.000us 313 350 89.43
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 33.000s 1786.130us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 27 test runs
aes_cipher_fi 95903797393472082663624009939651450109196166666570357952607720478951488802952 154
UVM_INFO @ 10011470318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 79883524315828716944688857013607074215569603140284879053331293742669742044514 148
UVM_INFO @ 10010634509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 60315209381680484336025802480309628478104462920856274320600593337735706034953 139
UVM_INFO @ 10015691000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 20335283826017855687797670194853186919662932600509707398029315480164461984595 148
UVM_INFO @ 10034968506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 94353292339426421066045945981896278086060677013551374991168999199507443361518 146
UVM_INFO @ 10002882961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 19658104886680671982873005903260314639622335800339589966775595038277159685990 151
UVM_INFO @ 10002670103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 78136445362513511927298133946796912941473996153223036059042609774669494999375 143
UVM_INFO @ 10043363910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 46723298731100487906370532883666585502026025175574485284512712167348136576432 147
UVM_INFO @ 10002971292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 113376256602180341979213604553103303621196713400429991188223016437156256317421 153
UVM_INFO @ 10011891326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 18438960974452720093842270905107295839505139448059440092382742811826902850395 139
UVM_INFO @ 10006900440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 73131920765747070692445911892948397871840520838897473994827690801056971668465 140
UVM_INFO @ 10036375661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 3576364506117609116125650585414283841528453649105697261575135676614003435530 140
UVM_INFO @ 10015152844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 95401700399567340591072244258301265668005632138212969934030969611281672761715 154
UVM_INFO @ 10010248767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 66158345551982178586124140118746900593184202241929435015641766251099198691821 146
UVM_INFO @ 10004892109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 41680104413076432017484596167402568543782126940152091760872630276581396928563 144
UVM_INFO @ 10007486178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 84098128476591531970666187465536482392921134379237371818371224397216901035615 139
UVM_INFO @ 10006884179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 97162777948161456130466479550925973594739821478084248829692865344019213688691 140
UVM_INFO @ 10014485701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 113399645945763394879501184899167395357458213071305933329068721130244007335199 151
UVM_INFO @ 10003473996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 110063214135478563714132411063314181218179108970169954170508053069112953230843 144
UVM_INFO @ 10011770099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 29070752756664930024265595251908867558710578161321788721822176654848588114036 150
UVM_INFO @ 10002166939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 91719478632800971576182305517750092523684775853078120951945947568734851470891 154
UVM_INFO @ 10050922313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 42592500020111980427253362386496296022416340493113493302432700221522846533698 145
UVM_INFO @ 10004877753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 56433580215066255107621854230425745393348589941563704993223886591256819991826 142
UVM_INFO @ 10005396735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 37633870441713315490631640550784186152696114083289090437324687572043109493730 151
UVM_INFO @ 10018922811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 39786632375127625250784090291976887747159680127710763431326176892862539283249 146
UVM_INFO @ 10003934662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 86234114602740409032304577383201518761335463994758926812315794702857529336038 136
UVM_INFO @ 10007587928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 113049960122418611655234338661789572920521627567664188310084582641519202581887 146
UVM_INFO @ 10012171635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 25 test runs
aes_cipher_fi 20009004920077385753225283811264808577251829766192867812681607239255069320291 None
aes_stress_all 28718396583666534189674497963072297328104115041242594819773614978529070011574 None
aes_control_fi 64207128822120183370143878090397402011565212298548419610113605208742920501740 None
aes_control_fi 111325613096860618249335887112922465110765532234321960560664388097250919646927 None
aes_cipher_fi 6364687990356663249074973443306144486739779742669947618736098962354088438186 None
aes_control_fi 9740261974660205828799834253222472791149725636412284995787979998865405265785 None
aes_control_fi 115782043698959788006534903284534048460480388811975258114993785435561696030082 None
aes_control_fi 100985861207444802778829741937274340853915550183378285376248751434974674837424 None
aes_cipher_fi 97528559410696734340099296175023611694652738965622982521322714224933672839232 None
aes_cipher_fi 8340127178122813100358092628101433759916532258818332771215772929289574051286 None
aes_control_fi 79267511596861966868629777203986708065147895793470128610553962893494460141282 None
aes_control_fi 52370196849226412559364597188131569902227024382446441893340546776207285847622 None
aes_control_fi 39455159195198823367518939432255777396786559660464283205730461047489767483 None
aes_cipher_fi 11187131958104772152302436956488312253744215070482605374268586308560655559023 None
aes_control_fi 76042460936971649628482365754867875618612396790334107593962831879944650255211 None
aes_control_fi 24157545797185330387584920078286852847764766012130553904387706571953261453835 None
aes_cipher_fi 11589209157611101229902845944824510508189405797119971984642827167302158790538 None
aes_control_fi 65775919609613285147551984517123033500115031896988618125516132021933057469370 None
aes_control_fi 49848676647991128255310947164985433239323707274691686591030968957313982796852 None
aes_control_fi 21308173630274917816152240448991974626413070745199885597450615757636422568742 None
aes_cipher_fi 57405385504910486582296372891714303417564054729682651642739762281210283367251 None
aes_control_fi 71458428425909502116408562687512050905187967527273574482420588801229713653147 None
aes_cipher_fi 19520533203482977658998015701310433760266963749728373591827983832001100861266 None
aes_cipher_fi 85565923454413279309523512064289697071958682816859931074911636228680845693000 None
aes_cipher_fi 71584506012087946820830806908205391145632743651739032671727660088282683455228 None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 18 test runs
aes_control_fi 5870903015710685736163332448721372036132707363314425342144681357509363638739 150
UVM_INFO @ 10005729697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 33268040763910332458500586446903215107330311651691171239168908181472005691726 144
UVM_INFO @ 10008845267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 93714531761450181697791372829656813536526168826529165833457302799259351782338 142
UVM_INFO @ 10027359933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 61015226921239899475133094197395905486489993053041373660809572578424160344578 148
UVM_INFO @ 10002653102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 44444194582014669124544085730258117093627563136283740567349706447140258906730 140
UVM_INFO @ 10005197007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 59517028558855219693107907713324099144412723625921090826925052929155349191956 153
UVM_INFO @ 10010972178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23602851068527416183403359770092576238996181221375437715943439587938169708540 156
UVM_INFO @ 10010940267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 33906183673354062737893225324702210290578172242098819731441590493909474582805 142
UVM_INFO @ 10006358434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 76201099975489885896501650897018667117888946927343531448331246723045072098504 151
UVM_INFO @ 10005620030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 4523791356584583205597834619783990962910667519418013085119263434252768126646 155
UVM_INFO @ 10002292719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 24381914664789470867923726895565533470099425365732350893889959681055102233035 141
UVM_INFO @ 10010772788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 97583322368089094408857345881234646505950906278023618538614799833454673868215 148
UVM_INFO @ 10007890143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 82607602023494711251779615846964701152283601360433868321845337576938487937720 150
UVM_INFO @ 10017447829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 36102400302919181648996793922084804940413827617411359940147103220922720228966 149
UVM_INFO @ 10024008959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 100528130888842787039919565253813505553135930368021759299388903178582267177244 139
UVM_INFO @ 10006116488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 76652961874984813235276366465752509744429564528278077680104772225846479690627 151
UVM_INFO @ 10005730012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 42474480410100127595203274740729542235018131947136645552541841725505872540912 142
UVM_INFO @ 10003041998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 53702624170266914929585696692224773841528439945948890807488608943152066780639 142
UVM_INFO @ 10002893376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 12 test runs
aes_stress_all_with_rand_reset 102727694211611539865345118157072378893465907221578310009782463322152572714360 253
UVM_INFO @ 649098442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 51404302992956501606428717623068358438889675551404263875945483199539415395626 5411
UVM_INFO @ 20994634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 27695060511221218788830174235638289610070250509599758481678869570443852896804 4009
UVM_INFO @ 508489908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 111195004892566495661062826983376670889412890046745784525754296632178935108811 754
UVM_INFO @ 1194237186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 70440084293641133625663591113148678279405269320534935703566430319674626966444 3973
UVM_INFO @ 262934084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 115314895070713128406807281175568708720650411853539360463186709472864199674338 651
UVM_INFO @ 212326466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 30340247866863847629306599826576380594397674491252785775733861319424285829791 278
UVM_INFO @ 119556419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 24485853614533388214380758994830494886092995665765013558776372597182902038226 4758
UVM_INFO @ 102721449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 61190948985072638224798443162181045599612236556921022909935015350780510660695 822
UVM_INFO @ 77707277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 48064272168434573673818487733033034527675628246822232577743579293283787761264 861
UVM_INFO @ 939046359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 77527977442118962565176260550142274992101198337114432555524768289221896846129 12827
UVM_INFO @ 1457928272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 97921869056981197760984802459771446377543616035338526071485616218815217697077 498
UVM_INFO @ 181702256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 10 test runs
aes_fi 1306870392359691598037005510701283204135582972091078689373628673017007224028 4815
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 38109873865579518993053569281997452595648795844433404062947849484492431073034 3763
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
aes_fi 5122620827196228246228952828195663844677318387512484899808333855955723952317 5779
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
aes_fi 793355940589627876773489237864278371735529291685998463873623023511399465065 8857
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 3
----| Expected corrupted: 0
aes_fi 61964376337705100818675667377343346714025795741590836487453412032835714145593 9960
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
aes_fi 69786438560283124855109837650070442518943346859732079048528765494664164041369 5086
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 106871126113950960946046067081861532459710900060665155406541926567554095285277 7357
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
aes_fi 42897055267839290643740877788865262160407940935616775106148463679064899186902 6188
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 2
----| Expected corrupted: 0
aes_fi 61895618633034338737997610859861724821110366102943184639575583355854541372638 5481
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
aes_fi 25125188974998075955159052237748891890136265848215772302261716380849168942163 5074
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 4 test runs
aes_core_fi 7263936648984954350309156008056470507724104201664950455415035139777391236497 145
UVM_INFO @ 10120268244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 9547276658052211112019447704710045698747485801617129146132065483277694688590 139
UVM_INFO @ 10010595379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 19220479036683045854470442435660843396111994032263886399623839652403186417089 150
UVM_INFO @ 10019704646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 57593494030578059723667876963261325285742964472774506344835485684793136928344 149
UVM_INFO @ 10024262777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 3 test runs
aes_stress_all_with_rand_reset 60771672555054687327734122177315285415803857259136261975852243423131565860294 276
UVM_INFO @ 128734669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 41804197527556313389393828359681575336101556508208514369935511413833026704818 879
UVM_INFO @ 1786129634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 95401532149559895195099746596377885298616217988530100313880899866214585109001 138
UVM_INFO @ 3950421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # * 3 test runs
aes_clear 98808095365691222479261441763122251523403195536125792647478910355735186293569 1145
TEST FAILED MESSAGES DID NOT MATCH
0 ed 6d b9 0
1 ad c4 3b 0
aes_clear 100082947361971114802144005621884359866574792156527140854662557567217742471787 719
TEST FAILED MESSAGES DID NOT MATCH
0 b4 82 be 0
1 b7 1b 64 0
aes_stress_all 95426059208453804068283393880146528081339685125800331613055652798164771024626 13328
TEST FAILED MESSAGES DID NOT MATCH
0 69 92 92 0
1 00 90 90 0
UVM_FATAL (cip_base_vseq__shadow_reg_errors.svh:336) [aes_common_vseq] ctrl_shadowed update_err alert timeout 2 test runs
aes_shadow_reg_errors 54138357322285574171313522990362185473938714424336832093238804073431714432437 106
UVM_INFO @ 10023850889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_shadow_reg_errors 21701374796276722840954328089125651115142622063529405058541681634453527416668 107
UVM_INFO @ 10107668954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 2 test runs
aes_control_fi 112281527628393432311240202491097021544653221557806400790896184838955755183865 144
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 100039033063604793703494051142731265938123709380355019737133875623803517012330 143
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: aes_reg_block_extended.ctrl_shadowed reset value: * 1 test run
aes_shadow_reg_errors 46681070954658736874122785820226598780399172448810060588926066738718822122255 106
UVM_INFO @ 13528284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:1082) virtual_sequencer [aes_reseed_vseq] 1 test run
aes_stress_all_with_rand_reset 90944908808955692623793336282408533782385384082749062572438934349947150547975 144
Was able to clear FATAL ALERT without reset
---| Idle: 0
---| Stall: 0
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) 1 test run
aes_core_fi 9525420563066936814895104405923575486993238600958355982889655028611435307031 140
UVM_INFO @ 10012066320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1137): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) 1 test run
aes_alert_reset 89731477101037318740401978831454082538717288654757723334446723063343808160774 788
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1143): (time 13903877 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 13863877 PS)
UVM_ERROR @ 13903877 ps: (aes_core.sv:1137) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=13) 1 test run
aes_core_fi 52868265302870363084685707972359674909151080446714454881256465392241204945905 149
UVM_INFO @ 10020075479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) 1 test run
aes_core_fi 110534754709242377525446668989498616074237858655467266785853923276275081248735 140
UVM_INFO @ 10031565081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred! 1 test run
aes_core_fi 9520543947361100091445405980178700728067745192990713534274988627500535600949 137
UVM_INFO @ 10008254337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) 1 test run
aes_core_fi 104341875737034079248631351826362335474526926480077891488203120381595704927700 141
UVM_INFO @ 10012180792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---