Simulation Results: gpio

 
04/07/2026 02:41:51 DVSim: v1.49.0 sha: 98a020b json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.88 %
  • code
  • 94.91 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 80.52 %
Validation stages
V1
100.00%
V2
94.27%
V2S
100.00%
V3
30.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.730s 58.760us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.760s 54.720us 10 10 100.00
gpio_smoke_en_cdc_prim 1.750s 343.529us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.820s 114.271us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.940s 50.102us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.950s 43.011us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.670s 82.580us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.330s 38.716us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.760s 33.729us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.950s 43.011us 5 5 100.00
gpio_csr_aliasing 1.330s 38.716us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.710s 88.393us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.750s 159.801us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.290s 457.665us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.830s 124.284us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.390s 392.066us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.980s 396.261us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 21.220s 576.578us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.800s 168.576us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.260s 370.457us 10 10 100.00
stress_all 1 10 10.00
gpio_stress_all 79.260s 9205.879us 1 10 10.00
alert_test 10 10 100.00
gpio_alert_test 0.940s 15.602us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.980s 17.331us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.210s 59.466us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.210s 59.466us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.950s 43.011us 5 5 100.00
gpio_same_csr_outstanding 1.270s 38.126us 5 5 100.00
gpio_csr_aliasing 1.330s 38.716us 1 1 100.00
gpio_csr_hw_reset 0.940s 50.102us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.950s 43.011us 5 5 100.00
gpio_same_csr_outstanding 1.270s 38.126us 5 5 100.00
gpio_csr_aliasing 1.330s 38.716us 1 1 100.00
gpio_csr_hw_reset 0.940s 50.102us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.920s 410.164us 25 25 100.00
gpio_sec_cm 1.410s 93.872us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.920s 410.164us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 6 10 60.00
gpio_rand_straps 0.940s 15.707us 6 10 60.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 8.400s 306.755us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 13 test runs
gpio_stress_all 101693003876420740496873909218289326265972013237244401724102035977308157101514 803
UVM_INFO @ 4242144395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 50639285521225133538467652783287495927529191162748028756274710272757191518141 681
UVM_INFO @ 12781990821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 8711284756515243681308848100052107347524005182536978087716898675392190855836 352
UVM_INFO @ 485880954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 10049183195908074706891591470682591360899202991081935496904543874434139980356 75
UVM_INFO @ 14262085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 71121892860984444274095778311490758991920976204409608105553895239640579436622 422
UVM_INFO @ 2460344349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 79618748338453089090514855077304700645567089105510409523432706122208641415013 75
UVM_INFO @ 22530237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 38068962745575299296458757055651269769851579713809222171946841557534245336399 75
UVM_INFO @ 1351713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 97589838660836796689550054356268461852781368165080987647790050131284522683084 129
UVM_INFO @ 3597435799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 28974851301180366817841794587339398205231863409606421873162415835423892889337 601
UVM_INFO @ 2940740456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 110034790311125082582104495955624674191319481541297079054225645656488562788858 282
UVM_INFO @ 1846499243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 104086617550470467591215504453049411083778419986682321463441338718773425663071 75
UVM_INFO @ 23699335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 100791532987788403097637475976052560175543809630385187175869356246352297041537 650
UVM_INFO @ 9957981101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 2733714018496878169903452788027604192573005180619034768653317506671470557765 1619
UVM_INFO @ 19754900771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 6 test runs
gpio_stress_all_with_rand_reset 52048588499841754673728343310715376355876999386923532367325940897512974236616 79
UVM_INFO @ 623852215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59655886821960919663231917184124211986660084932296455759617604672126059401762 79
UVM_INFO @ 161809181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61383926452223177044883577757502077458321560095758189763077612648382082943338 78
UVM_INFO @ 5178025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48737734687320176510133998765010198324609743363208500284698448472609785004318 78
UVM_INFO @ 4205600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 49754984406942473924060363577329520700779379481793129127961875509945593381713 330
UVM_INFO @ 306754885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79357054487523602277897296606792643265796430143285324967104574826477925641172 79
UVM_INFO @ 427482608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 4 test runs
gpio_stress_all_with_rand_reset 45441528378874902248346941258634431425489021545008147402413528783771679912206 83
UVM_INFO @ 3316992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48368037663673891110470797112791115490425984135121590495079508875886021684860 176
UVM_INFO @ 265739179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68055661787791033294388402194998249650219493293011196548402407115954836845640 80
UVM_INFO @ 28211043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115618666624410595274418436439612986499446859253700675648668770842779264628182 83
UVM_INFO @ 84144853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---