Simulation Results: aes/masked

 
11/07/2026 02:34:57 DVSim: v1.49.0 sha: 58f8fdd json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 97.42 %
  • code
  • 96.57 %
  • assert
  • 98.38 %
  • func
  • 97.32 %
  • block
  • 96.92 %
  • line
  • 97.77 %
  • branch
  • 92.73 %
  • toggle
  • 97.99 %
  • FSM
  • 97.78 %
Validation stages
V1
100.00%
V2
95.87%
V2S
92.45%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 101.466us 1 1 100.00
smoke 10 10 100.00
aes_smoke 8.000s 991.562us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 16.000s 115.263us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 6.000s 70.054us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 25.000s 1180.303us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 22.000s 153.033us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 10.000s 357.950us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 6.000s 70.054us 5 5 100.00
aes_csr_aliasing 22.000s 153.033us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 8.000s 991.562us 10 10 100.00
aes_config_error 103.000s 6306.607us 50 50 100.00
aes_stress 7.000s 119.656us 10 10 100.00
key_length 70 70 100.00
aes_smoke 8.000s 991.562us 10 10 100.00
aes_config_error 103.000s 6306.607us 50 50 100.00
aes_stress 7.000s 119.656us 10 10 100.00
back2back 35 35 100.00
aes_stress 7.000s 119.656us 10 10 100.00
aes_b2b 35.000s 447.093us 25 25 100.00
backpressure 10 10 100.00
aes_stress 7.000s 119.656us 10 10 100.00
multi_message 95 95 100.00
aes_smoke 8.000s 991.562us 10 10 100.00
aes_config_error 103.000s 6306.607us 50 50 100.00
aes_stress 7.000s 119.656us 10 10 100.00
aes_alert_reset 37.000s 991.063us 25 25 100.00
failure_test 85 85 100.00
aes_man_cfg_err 3.000s 54.976us 10 10 100.00
aes_config_error 103.000s 6306.607us 50 50 100.00
aes_alert_reset 37.000s 991.063us 25 25 100.00
trigger_clear_test 10 10 100.00
aes_clear 28.000s 226.486us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 10.000s 649.840us 1 1 100.00
reset_recovery 25 25 100.00
aes_alert_reset 37.000s 991.063us 25 25 100.00
stress 10 10 100.00
aes_stress 7.000s 119.656us 10 10 100.00
sideload 20 20 100.00
aes_stress 7.000s 119.656us 10 10 100.00
aes_sideload 14.000s 2740.676us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 7.000s 74.382us 10 10 100.00
stress_all 1 10 10.00
aes_stress_all 10801.000s 0.000us 1 10 10.00
alert_test 10 10 100.00
aes_alert_test 32.000s 77.593us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 4.000s 1707.541us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 4.000s 1707.541us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 16.000s 115.263us 1 1 100.00
aes_csr_rw 6.000s 70.054us 5 5 100.00
aes_csr_aliasing 22.000s 153.033us 1 1 100.00
aes_same_csr_outstanding 3.000s 210.878us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 16.000s 115.263us 1 1 100.00
aes_csr_rw 6.000s 70.054us 5 5 100.00
aes_csr_aliasing 22.000s 153.033us 1 1 100.00
aes_same_csr_outstanding 3.000s 210.878us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 6 10 60.00
aes_reseed 9.000s 561.942us 6 10 60.00
fault_inject 598 660 90.61
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
shadow_reg_update_error_with_csr_rw 18 20 90.00
aes_shadow_reg_errors_with_csr_rw 22.000s 10075.180us 18 20 90.00
tl_intg_err 30 30 100.00
aes_sec_cm 5.000s 1309.097us 5 5 100.00
aes_tl_intg_err 8.000s 384.910us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 8.000s 384.910us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 25 25 100.00
aes_alert_reset 37.000s 991.063us 25 25 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
sec_cm_main_config_sparse 139 145 95.86
aes_smoke 8.000s 991.562us 10 10 100.00
aes_stress 7.000s 119.656us 10 10 100.00
aes_alert_reset 37.000s 991.063us 25 25 100.00
aes_core_fi 39.000s 10038.466us 94 100 94.00
sec_cm_gcm_config_sparse 154 160 96.25
aes_config_error 103.000s 6306.607us 50 50 100.00
aes_stress 7.000s 119.656us 10 10 100.00
aes_core_fi 39.000s 10038.466us 94 100 94.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 177.213us 20 20 100.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 3.000s 133.093us 10 10 100.00
aes_stress 7.000s 119.656us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 7.000s 119.656us 10 10 100.00
aes_sideload 14.000s 2740.676us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 3.000s 133.093us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 3.000s 133.093us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 3.000s 133.093us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 3.000s 133.093us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 3.000s 133.093us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 7.000s 119.656us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 7.000s 119.656us 10 10 100.00
sec_cm_main_fsm_sparse 0 10 0.00
aes_fi 6.000s 213.414us 0 10 0.00
sec_cm_main_fsm_redun 623 685 90.95
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
aes_ctr_fi 5.000s 180.610us 25 25 100.00
sec_cm_cipher_fsm_sparse 0 10 0.00
aes_fi 6.000s 213.414us 0 10 0.00
sec_cm_cipher_fsm_redun 598 660 90.61
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
sec_cm_cipher_ctr_redun 326 350 93.14
aes_cipher_fi 60.000s 0.000us 326 350 93.14
sec_cm_ctr_fsm_sparse 0 10 0.00
aes_fi 6.000s 213.414us 0 10 0.00
sec_cm_ctr_fsm_redun 297 335 88.66
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_ctr_fi 5.000s 180.610us 25 25 100.00
sec_cm_ghash_fsm_sparse 0 10 0.00
aes_fi 6.000s 213.414us 0 10 0.00
sec_cm_ctrl_sparse 623 685 90.95
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
aes_ctr_fi 5.000s 180.610us 25 25 100.00
sec_cm_main_fsm_global_esc 25 25 100.00
aes_alert_reset 37.000s 991.063us 25 25 100.00
sec_cm_main_fsm_local_esc 623 685 90.95
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
aes_ctr_fi 5.000s 180.610us 25 25 100.00
sec_cm_cipher_fsm_local_esc 623 685 90.95
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
aes_ctr_fi 5.000s 180.610us 25 25 100.00
sec_cm_ctr_fsm_local_esc 297 335 88.66
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_ctr_fi 5.000s 180.610us 25 25 100.00
sec_cm_ghash_fsm_local_esc 0 10 0.00
aes_fi 6.000s 213.414us 0 10 0.00
sec_cm_data_reg_local_esc 598 660 90.61
aes_fi 6.000s 213.414us 0 10 0.00
aes_control_fi 61.000s 0.000us 272 300 90.67
aes_cipher_fi 60.000s 0.000us 326 350 93.14
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 42.000s 13792.499us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 22 test runs
aes_cipher_fi 72448101767738705840055353009098330038782437108614749486287945167522510314262 147
UVM_INFO @ 10011060106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 58328068046783239275588448994132468614726793583864508596746401484948851585958 145
UVM_INFO @ 10010885930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 80720670365808464314677899997184555945944042070364251397431788399559979967766 143
UVM_INFO @ 10013840151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 81815053254011238272185655044419121666680842626636208764768962647680177848641 143
UVM_INFO @ 10015983776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 52655271654585303011801480197038901620251373044176391572922965269016907086576 150
UVM_INFO @ 10007928111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 25891895138366098076882343593638848582667145765932077748753612892121119988285 137
UVM_INFO @ 10020414519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 20187846130123455904427437444044237254342261270285092108956811130582387299720 140
UVM_INFO @ 10005867061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 86031785206518029129428946188751909622966683719704300344943758437482091658814 150
UVM_INFO @ 10006905354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 40016952835276682485650247678669095028102319909228776777602584836154519502246 148
UVM_INFO @ 10004299497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 71504729241889382386659280916936236790952726924375696060793691320452920591853 140
UVM_INFO @ 10009638073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 36031367516248785057749733019327815822969632009487573562841322834063317266149 143
UVM_INFO @ 10048412381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 55111553465032519430644451576180494984924052430491136078603284993066785703615 137
UVM_INFO @ 10026636632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 12396709316555643833901026011952671165851028834144313637234888956951852065581 148
UVM_INFO @ 10005776733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 65600237810474561012628872492112934316974349819331614931675526127232168054907 145
UVM_INFO @ 10033999030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 95868867590158411486816137630683566294374717549026228158204399734268849250968 153
UVM_INFO @ 10017292292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 25410842780305932727215335300371807433982674114129313724217058618870485767019 149
UVM_INFO @ 10019493652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 111126491755047039655064401742118598459348955901597338977993666827270896661338 145
UVM_INFO @ 10014531983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 43796620302421522726442524011893891314781530087632931413184179218198688934484 142
UVM_INFO @ 10074707011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 35755430068586072174711935553649244353480997655552311259422820149727177231474 140
UVM_INFO @ 10020539346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 2167253051241825364165361624732604366357746364836808189289403200439701503231 138
UVM_INFO @ 10011388645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 13986014349538286957311625219920381284002585944407416276578285488884513852393 141
UVM_INFO @ 10015853519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 23195282529675125650976069936131120825049538500614707264245056234443097898506 142
UVM_INFO @ 10023357491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 17 test runs
aes_stress_all 89608801209393160493610754595599927837868140027119527917410446763787340926854 None
aes_stress_all 107418420282556513732985172950621217582583711366947366791927746667077260842952 None
aes_control_fi 112808835157933370600507773297157813149287075448226802624906452878092132953063 None
aes_control_fi 114473855540867444291437148136910229249998246713805393920522604237941070252425 None
aes_control_fi 53017433595292363101503209248465400077464535530957234685626139734840481141290 None
aes_control_fi 48520433558386872672980935390078986359925970846521134711199645127043571115498 None
aes_control_fi 15493357730210261169959026560747081931045330308195549110099956262241078172985 None
aes_control_fi 51931285375900322700457352875942749733883511972250669324929953050010301989273 None
aes_control_fi 91930899017756731919757319816640663829277005587150327581046426123950553461689 None
aes_control_fi 59839927641888459361305781908484325811529180573167739706334904269125263031631 None
aes_control_fi 9395022025254485387212946136063452732717415669459381023692720903189781297754 None
aes_control_fi 112231596118674448361387341921980295839288099736779228565962434008422469459183 None
aes_control_fi 4098162634752979001525602840759171298305257341543796845595788777960454854137 None
aes_control_fi 57764110813518953549932399519760991009402871293729839898203804737437392641483 None
aes_control_fi 91340724671187787637291430351133773340945854371651256604978071982699054421845 None
aes_cipher_fi 8997479246400822174242632059764926368544187731449071293639447080536751424249 None
aes_cipher_fi 104853016725607707678365830524266408799826908199959852320006930763221117906647 None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 15 test runs
aes_control_fi 17605193398603243265866873116373672355100307922575709242962700411851464614263 140
UVM_INFO @ 10035417288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 7563022510458592992622358746681386080210549832763691860896237684359712315928 153
UVM_INFO @ 10078220008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 114145416263705126503830429178424893167729618774918226610727122723067228192937 155
UVM_INFO @ 10006260626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 100827969251718116864602044531043542941350795205712209162746253118212887643368 142
UVM_INFO @ 10009236387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 67571265614950544355421979577891986132875198755310317072682552208967839157149 141
UVM_INFO @ 10016458738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23522558161163204006534966203781031007183680422433810677073166111645532808301 145
UVM_INFO @ 10013509050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 89523781166149092433095950038973429475476897700338383357668369774245232346887 150
UVM_INFO @ 10019291328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 59699982281226975301684803188742258594873032721919442435390297231331944142490 151
UVM_INFO @ 10017683846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 39828038326615638040160679284975040338226368605712074193424929989493247094482 142
UVM_INFO @ 10005519799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 80018354868937837264366783948474956390296402592894456763198911312665281546225 143
UVM_INFO @ 10022327673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 97035171817076292858505057215230869602846130395606995993182053463141523263554 145
UVM_INFO @ 10007269761 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 63605982878262281048734016502799502517575142309362394625677588155103450647637 152
UVM_INFO @ 10020550748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 77295612471784970916338550091457961688917863951066448769591675813953403041662 144
UVM_INFO @ 10009506768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 59731546908495344309604031394914434544416318036396411734449670522622004011968 146
UVM_INFO @ 10020892018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 26490370676027593838619245883444298470259336528128757162100089803813240901508 144
UVM_INFO @ 10012218665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 13 test runs
aes_reseed 9341245757037308426529726454172466021867834169446216395558807616244871000282 2408
UVM_INFO @ 255942628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 43454829753704443923179554848899477369466451672743134867217126342126317150908 11665
UVM_INFO @ 53224912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 7893645938524939689151137910693231554025895586916191561245687137804884494045 547
UVM_INFO @ 1303287712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 25881409212697720544061212948398445695445908638846553423657914095354524840243 108620
UVM_INFO @ 492690787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 27520968580907990755828046881675053443949929545203761627302946366983566484132 949
UVM_INFO @ 630755285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 29320817318519249846993025095842695274613409631168474279346837116669506775951 3773
UVM_INFO @ 634475287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 29015958452764998291795352521335943614488840656521813510906248635945249494826 8075
UVM_INFO @ 123339916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 25604295159946314645482335150897081853982674743622887000009096491438947508286 29735
UVM_INFO @ 1652037268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 104097569915168224837677849614999368675954452984808447278046918071311146413764 1014
UVM_INFO @ 7464793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 53646021035828441225596004467820168415727183909152795733327083672517710211969 4489
UVM_INFO @ 19869593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 17993709250313664531031260110159507256931106860011630254294285054625410659315 6422
UVM_INFO @ 81202137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 31944385060644682498181843151115410611919192174337355076969899076575217971889 4741
UVM_INFO @ 155863691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 62174578365662021143117860935107651188336710703565693982314744713237822915024 46412
UVM_INFO @ 274273248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 9 test runs
aes_fi 38375602106959092225210469325525900211795425613607781603080121100525212328833 15161
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
aes_fi 115224014851565795192494237399532183998960555024126691681314493831367446766739 16121
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
aes_fi 54620003386909128349594270417533734225093005571775154389551475719922761537298 22894
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 11741791084501890909126882307167029091652260832947623642282527893603985174161 10756
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
aes_fi 63892622894109683099611427538473773852349899326913862317449032079617411321022 9511
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
aes_fi 63919546726424972238738433419730574156182023699731146891436726429506293059258 11030
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 17233261245696415449369086588833009661628900386549314943402778921832097861046 7700
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
aes_fi 39288376010401590020515397914649365978703484672653645577200559751711933527049 8417
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
aes_fi 54846861048642299296945895635680872040867802250039546711789189880451167176948 19138
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 6 test runs
aes_stress_all_with_rand_reset 76732735445324685518315349277922723254158488424592005455586741273876235671073 135
UVM_INFO @ 14812681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 18688526705974487678936823592188634266114027701481223528795746679478984798075 164
UVM_INFO @ 82332153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 106605243149358253925708684966097628373065134858142911658304152251299568295475 158
UVM_INFO @ 109021070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 69340172914457136759245993283693914714279986828282387430315363134511408733156 167
UVM_INFO @ 98894111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 97880833792077559862637900413048694221126940150346265113976472841070190506238 1129
UVM_INFO @ 13792498740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 29363228819213026415705735843153197107741383577817477326652985766018984829224 155
UVM_INFO @ 34041295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 6 test runs
aes_core_fi 4819082755026174237208906343373671566213119826372016007765012155090007645440 148
UVM_INFO @ 10045108173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 105880835379296378292734755543405168952277289144052006864237894645089850897325 144
UVM_INFO @ 10008735303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 19018798750130354506584030801199154955341198210313925219984560807713415984198 147
UVM_INFO @ 10012250430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 113462104040524606603822947162692943341920668021599562363208848397293926456451 151
UVM_INFO @ 10021159867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 69322250186532281145868624740192336431917784482399380114962469429054071112012 146
UVM_INFO @ 10038465537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 40705485133592888031349493689357999675266032531890055951598684910555526527113 139
UVM_INFO @ 10005308351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 2 test runs
aes_stress_all_with_rand_reset 106959472686697531976056154181186449995781101881143628253495087175910616524962 109
UVM_INFO @ 123830737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 104368807796608381208215883632331581476884043295400140184498946559546292912681 109
UVM_INFO @ 7931369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1143): Assertion AesSecCmDataRegLocalEscIv has failed (* cycles, starting * PS) 1 test run
aes_fi 109070472427536558878717457749198565722447072392588870472732170462614840367688 3078
UVM_ERROR @ 22277481 ps: (aes_core.sv:1143) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 22277481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1381) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! 1 test run
aes_shadow_reg_errors_with_csr_rw 97717886550818473251038334746849905239115095148068597615928117804954209349628 106
UVM_INFO @ 90524818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq__shadow_reg_errors.svh:336) [aes_common_vseq] ctrl_shadowed update_err alert timeout 1 test run
aes_shadow_reg_errors_with_csr_rw 99057554156765087847691306453279645127523240065517139147802976694252220738960 107
UVM_INFO @ 10075179530 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---