Simulation Results

Simulation Results: aes/unmasked

11/07/2026 02:34:57 DVSim: v1.49.0 sha: 58f8fdd json Branch: master Tool: xcelium [unknown]

Coverage statistics

Total
96.07 %

code
92.98 %

assert
97.92 %

func
97.32 %

block
93.93 %

line
95.22 %

branch
87.50 %

toggle
98.08 %

FSM
91.11 %

Validation stages

V1		100.00%
V2		97.71%
V2S		92.55%
V3		0.00%

24/24 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
wake_up				1	1	100.00
	aes_wake_up	2.000s	211.426us	1	1	100.00
smoke				10	10	100.00
	aes_smoke	3.000s	162.752us	10	10	100.00
csr_hw_reset				1	1	100.00
	aes_csr_hw_reset	2.000s	88.075us	1	1	100.00
csr_rw				5	5	100.00
	aes_csr_rw	2.000s	57.271us	5	5	100.00
csr_bit_bash				1	1	100.00
	aes_csr_bit_bash	6.000s	300.065us	1	1	100.00
csr_aliasing				1	1	100.00
	aes_csr_aliasing	3.000s	71.461us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	aes_csr_mem_rw_with_rand_reset	2.000s	65.963us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	aes_csr_rw	2.000s	57.271us	5	5	100.00
	aes_csr_aliasing	3.000s	71.461us	1	1	100.00

213/218 passed

97.71 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
algorithm				70	70	100.00
	aes_smoke	3.000s	162.752us	10	10	100.00
	aes_config_error	4.000s	563.919us	50	50	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
key_length				70	70	100.00
	aes_smoke	3.000s	162.752us	10	10	100.00
	aes_config_error	4.000s	563.919us	50	50	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
back2back				35	35	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
	aes_b2b	7.000s	158.053us	25	25	100.00
backpressure				10	10	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
multi_message				94	95	98.95
	aes_smoke	3.000s	162.752us	10	10	100.00
	aes_config_error	4.000s	563.919us	50	50	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
	aes_alert_reset	5.000s	386.909us	24	25	96.00
failure_test				84	85	98.82
	aes_man_cfg_err	3.000s	68.013us	10	10	100.00
	aes_config_error	4.000s	563.919us	50	50	100.00
	aes_alert_reset	5.000s	386.909us	24	25	96.00
trigger_clear_test				10	10	100.00
	aes_clear	4.000s	439.964us	10	10	100.00
nist_test_vectors				1	1	100.00
	aes_nist_vectors	7.000s	5021.084us	1	1	100.00
reset_recovery				24	25	96.00
	aes_alert_reset	5.000s	386.909us	24	25	96.00
stress				10	10	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
sideload				20	20	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
	aes_sideload	4.000s	86.071us	10	10	100.00
deinitialization				10	10	100.00
	aes_deinit	4.000s	918.359us	10	10	100.00
stress_all				6	10	60.00
	aes_stress_all	10803.000s	0.000us	6	10	60.00
alert_test				10	10	100.00
	aes_alert_test	2.000s	104.174us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	aes_tl_errors	4.000s	155.297us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	aes_tl_errors	4.000s	155.297us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	aes_csr_hw_reset	2.000s	88.075us	1	1	100.00
	aes_csr_rw	2.000s	57.271us	5	5	100.00
	aes_csr_aliasing	3.000s	71.461us	1	1	100.00
	aes_same_csr_outstanding	2.000s	85.770us	5	5	100.00
tl_d_partial_access				12	12	100.00
	aes_csr_hw_reset	2.000s	88.075us	1	1	100.00
	aes_csr_rw	2.000s	57.271us	5	5	100.00
	aes_csr_aliasing	3.000s	71.461us	1	1	100.00
	aes_same_csr_outstanding	2.000s	85.770us	5	5	100.00

V2S

907/980 passed

92.55 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
reseeding				6	10	60.00
	aes_reseed	7.000s	491.069us	6	10	60.00
fault_inject				599	660	90.76
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
shadow_reg_update_error				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
shadow_reg_read_clear_staged_value				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
shadow_reg_storage_error				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
shadowed_reset_glitch				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
shadow_reg_update_error_with_csr_rw				19	20	95.00
	aes_shadow_reg_errors_with_csr_rw	4.000s	253.505us	19	20	95.00
tl_intg_err				29	30	96.67
	aes_sec_cm	34.000s	10366.146us	4	5	80.00
	aes_tl_intg_err	4.000s	585.228us	25	25	100.00
sec_cm_bus_integrity				25	25	100.00
	aes_tl_intg_err	4.000s	585.228us	25	25	100.00
sec_cm_lc_escalate_en_intersig_mubi				24	25	96.00
	aes_alert_reset	5.000s	386.909us	24	25	96.00
sec_cm_main_config_shadow				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
sec_cm_gcm_config_shadow				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
sec_cm_main_config_sparse				140	145	96.55
	aes_smoke	3.000s	162.752us	10	10	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
	aes_alert_reset	5.000s	386.909us	24	25	96.00
	aes_core_fi	40.000s	10003.140us	96	100	96.00
sec_cm_gcm_config_sparse				156	160	97.50
	aes_config_error	4.000s	563.919us	50	50	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
	aes_core_fi	40.000s	10003.140us	96	100	96.00
sec_cm_aux_config_shadow				19	20	95.00
	aes_shadow_reg_errors	3.000s	145.288us	19	20	95.00
sec_cm_aux_config_regwen				20	20	100.00
	aes_readability	3.000s	94.197us	10	10	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
sec_cm_key_sideload				20	20	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
	aes_sideload	4.000s	86.071us	10	10	100.00
sec_cm_key_sw_unreadable				10	10	100.00
	aes_readability	3.000s	94.197us	10	10	100.00
sec_cm_data_reg_sw_unreadable				10	10	100.00
	aes_readability	3.000s	94.197us	10	10	100.00
sec_cm_key_sec_wipe				10	10	100.00
	aes_readability	3.000s	94.197us	10	10	100.00
sec_cm_iv_config_sec_wipe				10	10	100.00
	aes_readability	3.000s	94.197us	10	10	100.00
sec_cm_data_reg_sec_wipe				10	10	100.00
	aes_readability	3.000s	94.197us	10	10	100.00
sec_cm_data_reg_key_sca				10	10	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
sec_cm_key_masking				10	10	100.00
	aes_stress	4.000s	1207.825us	10	10	100.00
sec_cm_main_fsm_sparse				0	10	0.00
	aes_fi	4.000s	242.336us	0	10	0.00
sec_cm_main_fsm_redun				624	685	91.09
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
	aes_ctr_fi	3.000s	98.775us	25	25	100.00
sec_cm_cipher_fsm_sparse				0	10	0.00
	aes_fi	4.000s	242.336us	0	10	0.00
sec_cm_cipher_fsm_redun				599	660	90.76
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
sec_cm_cipher_ctr_redun				323	350	92.29
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
sec_cm_ctr_fsm_sparse				0	10	0.00
	aes_fi	4.000s	242.336us	0	10	0.00
sec_cm_ctr_fsm_redun				301	335	89.85
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_ctr_fi	3.000s	98.775us	25	25	100.00
sec_cm_ghash_fsm_sparse				0	10	0.00
	aes_fi	4.000s	242.336us	0	10	0.00
sec_cm_ctrl_sparse				624	685	91.09
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
	aes_ctr_fi	3.000s	98.775us	25	25	100.00
sec_cm_main_fsm_global_esc				24	25	96.00
	aes_alert_reset	5.000s	386.909us	24	25	96.00
sec_cm_main_fsm_local_esc				624	685	91.09
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
	aes_ctr_fi	3.000s	98.775us	25	25	100.00
sec_cm_cipher_fsm_local_esc				624	685	91.09
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29
	aes_ctr_fi	3.000s	98.775us	25	25	100.00
sec_cm_ctr_fsm_local_esc				301	335	89.85
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_ctr_fi	3.000s	98.775us	25	25	100.00
sec_cm_ghash_fsm_local_esc				0	10	0.00
	aes_fi	4.000s	242.336us	0	10	0.00
sec_cm_data_reg_local_esc				599	660	90.76
	aes_fi	4.000s	242.336us	0	10	0.00
	aes_control_fi	61.000s	0.000us	276	300	92.00
	aes_cipher_fi	61.000s	0.000us	323	350	92.29

0/10 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	10	0.00
	aes_stress_all_with_rand_reset	21.000s	821.501us	0	10	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!				19 test runs
	aes_cipher_fi	2653514290828700573390702673376627044427947019675495043397071595834288447335	144	UVM_INFO @ 10004945520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	35749399625875375159225734018351327831434757112132180097751381150397534737506	144	UVM_INFO @ 10010230292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	113317852083050706124054995824728537069527209482769692902332218647706962717960	148	UVM_INFO @ 10010771082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	51809328229219817325689488902404756712675668588654174263882066605337763222000	144	UVM_INFO @ 10013482486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	5455457210723203575510708339799448322169295780377678915641045870884207553181	142	UVM_INFO @ 10004096805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	81607466442887131012198453661142942467554085953928375655504843705695174212704	146	UVM_INFO @ 10034051763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	88027705157279678990279599725794223348797820881449987079943965345848325110544	142	UVM_INFO @ 10007057062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	106270587002718982457794882418566637133208526563780341183023817530755983355061	149	UVM_INFO @ 10009304048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	27514994884861531884616941666746256887013147982261359294668502794449508691063	140	UVM_INFO @ 10011886857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	67482008378865289307897513848986835535244428558961078505381580531489611358206	153	UVM_INFO @ 10007224675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	112615282633764615923777315408409372172678214121756116738503822353480728031735	142	UVM_INFO @ 10052948573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	2380825273398437463917651206391624220578143033322692279859965273416338606128	141	UVM_INFO @ 10024313633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	24093277788949304416154958251158434013295910012028124125046515771346260919791	147	UVM_INFO @ 10010737028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	17568247012766161721832391014841112955104572047842021201583765403990556698759	148	UVM_INFO @ 10006539201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	60515832396770852384161599210139478252672254632067120498578330083667397018450	143	UVM_INFO @ 10005626645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	87190910465536586519857352367224908873032102148966842391243029322809740247284	146	UVM_INFO @ 10057584892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	87569035179807872840484592974238885461406300733262607977505431028759005700599	143	UVM_INFO @ 10003025236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	39442471491522294406963692549813890503323596854529944260755761202368881629852	154	UVM_INFO @ 10003392527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_cipher_fi	9784840687858214653701825251755383681554452614808752887903622046907029908272	142	UVM_INFO @ 10004667917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Job timed out after * minutes				17 test runs
	aes_control_fi	53430940264189462654805878842904460253704470488549871065804882342119197130699	None
	aes_stress_all	79317503244642836523548024112719341226886985691853884962113298870310200401353	None
	aes_control_fi	85164357339273519319399310674423872830996781180400544293909826037577789690591	None
	aes_cipher_fi	71876281605100198275692352850812073424815131588599985231419061937629977508955	None
	aes_cipher_fi	93322179625872599620986343699631383962270661265552846099282090239024740807804	None
	aes_cipher_fi	71414807238449432279368668020082766489479855660370657962943541103601320757640	None
	aes_cipher_fi	38296502497512399671072274256399710260600503562415372142271951443300808712075	None
	aes_control_fi	106135605116562415829319738071541371756116406216313905606493193583202712174492	None
	aes_control_fi	45114274548118098793245559805341217612526903310974560596099840914692478954442	None
	aes_control_fi	72855998748598397963213019175331873394019909878610989153266751212375545119782	None
	aes_cipher_fi	64384571401265032535339999719120452401174132108287803930780893251582641507817	None
	aes_control_fi	14063691559267259119400781995409349802512684825417121877058794517338337976177	None
	aes_cipher_fi	45813235159337539304996944825675977008111641595146652377907729685744403449521	None
	aes_control_fi	97063915322541642463292346419339859257634142415457552448865300848252561779724	None
	aes_control_fi	87324083809892915034113979369876907895599529315103539331651517062356390847257	None
	aes_cipher_fi	86760240262797890062664619800976811740498299609872804017331111306308521557537	None
	aes_cipher_fi	115455547005653622315419070250696209771060429255761968835849455136982994656645	None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!				14 test runs
	aes_control_fi	65654229954862149228614337243066382695615284132848441051369110690385926298492	150	UVM_INFO @ 10005837724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	23829720042398054109392054213131989321160205985540128347813719596730804330125	138	UVM_INFO @ 10003424650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	59559200889630621593363382550515164921259164114069645310555707977703371617094	141	UVM_INFO @ 10005130344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	490161738979737350332994965713299946945541858936581191935934444109345608760	140	UVM_INFO @ 10005600409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	107865583219663214729385513534094993549066877790011776892140306010305266864467	148	UVM_INFO @ 10005852668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	55122165382452959307825186354303758659287670044785158173550775309561614221160	149	UVM_INFO @ 10033729843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	71930113982858007772327518965574246780362285444643966912499499398675696576132	145	UVM_INFO @ 10003652169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	76773036501960992860579367088053001155754416010851666082574912429756248389745	140	UVM_INFO @ 10059671220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	85644950946179540622137998207128068431717231218275602268168884746280943468360	148	UVM_INFO @ 10021867362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	101404956738833998738907148941676917041671440616630605274626503010706341750739	149	UVM_INFO @ 10008273528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	104584848449181536678763277307325169259013340102053084164599044842492431808319	146	UVM_INFO @ 10005331902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	40565484763855080828325258622322751439233772560591193491374369980557370229923	141	UVM_INFO @ 10027012413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	56602301458773726216768524081098572470063665197668118295036239885424925869497	139	UVM_INFO @ 10106870318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_control_fi	45085960687568289801292986964819471775804386967392332869921745882835891145818	149	UVM_INFO @ 10017109347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues				12 test runs
	aes_reseed	16280250866265596321081027365423139508616589204856661127201150929966335208660	810	UVM_INFO @ 23724137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	96123572733006938438819653134083737923946660456861816846183414757422941512347	307	UVM_INFO @ 589456888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_reseed	96520319251489322683476032593682981072003951601526052637124041806301232472401	6177	UVM_INFO @ 270201709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all	110306610171187403630901151856109897090433015345499664143216468668086914717036	12084	UVM_INFO @ 768208199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_reseed	35420619601084481142579363786638878874916412419329129388241994911898063967504	2300	UVM_INFO @ 33733446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	28435090659889463047384874871165578655120010872801637510921519133351474909691	231	UVM_INFO @ 472417770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_reseed	83070300597933940926730428229407845697965797196141979322029928864783792499695	1355	UVM_INFO @ 222581595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	63775017316035377700076965001554274129775466283377608720507069849431652976106	1318	UVM_INFO @ 821500504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	115250743961873139746837674000483515895598694591316846414858684088848889950424	550	UVM_INFO @ 1139623230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all	90639980824230942796484882022807062611561448821178347554667417342495901313503	7947	UVM_INFO @ 203460655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	90867996529834277949425218272208449043926805948313629329702946375396350431283	800	UVM_INFO @ 1395229065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	112502931843106981268007813211727829699629069912195030553795191014682132472103	146	UVM_INFO @ 12998616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard]				10 test runs
	aes_fi	89510674840743115192475943967138516019679650973579864703099758383488808267393	4941	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 3 ----\| Seen: 2 ----\| Expected corrupted: 0
	aes_fi	53647054450498380319332418522769947128416145307049411310080915131226863676037	5773	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 4 ----\| Seen: 2 ----\| Expected corrupted: 0
	aes_fi	46716497007647897841831708185630962998031421648907333462713280303627178544057	7803	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 4 ----\| Seen: 3 ----\| Expected corrupted: 0
	aes_fi	81849292339630322130782812288581613976394691837048214221324980669509364759776	6328	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 3 ----\| Seen: 2 ----\| Expected corrupted: 0
	aes_fi	55618864926773835222598188890117978045005965336997008732966374090256315433559	6580	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 6 ----\| Seen: 4 ----\| Expected corrupted: 0
	aes_fi	34527741450367503549835287304393245778183429709461965808913890599713740240377	3697	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 5 ----\| Seen: 4 ----\| Expected corrupted: 0
	aes_fi	39091101121881704618059614664108535057115610062517416565047138674744833295500	7859	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 5 ----\| Seen: 4 ----\| Expected corrupted: 0
	aes_fi	111622761310717828910575034839831052271617100155234021871325964214581618311070	3514	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 3 ----\| Seen: 2 ----\| Expected corrupted: 0
	aes_fi	41240907401217719294438941758749872225844203674988709608747676717758972637916	4918	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 4 ----\| Seen: 3 ----\| Expected corrupted: 0
	aes_fi	81179998714965884614375030827111883578850157053689230407381100670295037527180	6416	----\| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL ----\| Expected: 5 ----\| Seen: 3 ----\| Expected corrupted: 0
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done)				3 test runs
	aes_stress_all_with_rand_reset	24795778079188390361825680689444596548420421291662775890246672121034464196230	144	UVM_INFO @ 172370269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	46953880681954101786958776593376370506736593472500869699159520763997914138212	502	UVM_INFO @ 516951743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_stress_all_with_rand_reset	22466224907660949698059744889084804624105009270511895327651631863001803178589	409	UVM_INFO @ 2372582482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred!				3 test runs
	aes_core_fi	70587283029254840704073550783249980490456378828059674058980990059903796993383	144	UVM_INFO @ 10006440015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_core_fi	34919476985420398399932203916396657017651900598204712689196813521100179378977	147	UVM_INFO @ 10003139957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	aes_core_fi	87567880397999676212882445274616174267539449128579278385746907854585080874424	143	UVM_INFO @ 10008440971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)				1 test run
	aes_stress_all_with_rand_reset	17316875225346089810850352217452227900244918768539846681213783386424624114989	109	UVM_INFO @ 24582190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:785) scoreboard [scoreboard] # *				1 test run
	aes_stress_all	64519977285821267168070295127850785487795258341291564225010980584741792041522	32148	TEST FAILED MESSAGES DID NOT MATCH 0 e3 9b 9b 0 1 00 9c 9c 0
UVM_FATAL (cip_base_vseq.sv:465) [aes_common_vseq] wait timeout occurred!				1 test run
	aes_sec_cm	111987571248662058073064172462750772228953937740149256434060221341648395249795	193	UVM_INFO @ 10366145783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [] vs []) Regname: aes_reg_block_extended.ctrl_shadowed reset value:				1 test run
	aes_shadow_reg_errors_with_csr_rw	63101428125230710316385575993750689351601872785086308020438473815942777464477	107	UVM_INFO @ 59332369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1381) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [] vs [*]) fatal error fatal_fault does not trigger!				1 test run
	aes_shadow_reg_errors	51589840086542405740933218490407791855022729148959925864011549911901668928886	106	UVM_INFO @ 14486016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
xmsim: E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_/rtl/aes_core.sv,1137): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS)				1 test run
	aes_alert_reset	2769490669469439521204941613588915666118437744615490472319919954281079527168	2199	UVM_ERROR @ 60899620 ps: (aes_core.sv:1137) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut UVM_INFO @ 60899620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred!				1 test run
	aes_core_fi	104013057034619989808824143626389421791415387972724483798759235507121889814399	141	UVM_INFO @ 10009229839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue				1 test run
	aes_control_fi	16766921065169712529483798226614630364920672888000551404398372773331802778721	147	UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:68) [aes_control_fi_vseq] wait timeout occurred!				1 test run
	aes_control_fi	74254664246988630676613272539091239580103193742149114026852963783684389290583	145	UVM_INFO @ 10010010919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---