Simulation Results: gpio

 
25/07/2026 02:41:09 DVSim: v1.49.0 sha: 72f4b42 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.96 %
  • code
  • 98.14 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.43 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
35.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.940s 515.001us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.640s 211.055us 10 10 100.00
gpio_smoke_en_cdc_prim 1.840s 320.104us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.790s 345.938us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.000s 13.787us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.970s 17.304us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.930s 1118.280us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.060s 84.170us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.640s 27.070us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.970s 17.304us 5 5 100.00
gpio_csr_aliasing 1.060s 84.170us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.480s 62.482us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.650s 39.747us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.230s 99.638us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.660s 206.685us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 4.010s 792.266us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.620s 93.895us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 21.220s 548.571us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.190s 404.669us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.450s 74.708us 10 10 100.00
stress_all 0 10 0.00
gpio_stress_all 162.710s 61826.435us 0 10 0.00
alert_test 10 10 100.00
gpio_alert_test 0.940s 31.594us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.960s 66.917us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 2.900s 51.863us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 2.900s 51.863us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.970s 17.304us 5 5 100.00
gpio_same_csr_outstanding 1.210s 64.369us 5 5 100.00
gpio_csr_aliasing 1.060s 84.170us 1 1 100.00
gpio_csr_hw_reset 1.000s 13.787us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.970s 17.304us 5 5 100.00
gpio_same_csr_outstanding 1.210s 64.369us 5 5 100.00
gpio_csr_aliasing 1.060s 84.170us 1 1 100.00
gpio_csr_hw_reset 1.000s 13.787us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.940s 128.320us 25 25 100.00
gpio_sec_cm 1.410s 390.665us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.940s 128.320us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 7 10 70.00
gpio_rand_straps 0.960s 50.941us 7 10 70.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 14.330s 800.403us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 13 test runs
gpio_stress_all 8706345015084693354484199713880034758081292486843621406863871223171817895346 651
UVM_INFO @ 4140369691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 27989295174365621319570486543718619886392266846988264234607007369716527884664 75
UVM_INFO @ 1392295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 102255087721899994750685233397003762251699177153635540592639235351445825109091 157
UVM_INFO @ 497675564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 37852920545557225537785692278377835695611028139144807657435126234852741662096 75
UVM_INFO @ 1774788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 108896557551556246651554073945637107001208985334603023516336664081212891787138 882
UVM_INFO @ 6819697455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35091233327453999365370753433151202184761031661438326839182696219078363554331 176
UVM_INFO @ 1956594788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 13904622960552537558070165886433981693676199709360473746494408939704986207966 76
UVM_INFO @ 165751506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 81756321013969652747185957231103319766996164274267621810188913473440898454622 580
UVM_INFO @ 14213999213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 102630853734682044163402079719431249219621774387476618452156926325849293055391 3911
UVM_INFO @ 61826434876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 102812249064793042431101205471321925135780987299154625427427220214331833503286 1564
UVM_INFO @ 5010106926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 43199828703448919087853907374727901078146872906637230291034872459824885472414 438
UVM_INFO @ 12845116792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 97105816877383152855664580818323150084929098009833729899641933429350356749710 1484
UVM_INFO @ 9706372719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 80669713127889709796569101653234609258045803297896448100106505432595218712085 75
UVM_INFO @ 2521653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 7 test runs
gpio_stress_all_with_rand_reset 67810917941070994399080716021456650509739923645336703023628969398358953590929 133
UVM_INFO @ 238460903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50265428613883896099655907457689992001162213541338040779994092966198943395736 82
UVM_INFO @ 1750237012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104682627768026377411581907071551068680248927998986917274642269276480978071266 217
UVM_INFO @ 1349182757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38198399265772027286796711459388905304494331442048736152670823444629914293814 80
UVM_INFO @ 10319791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87409549049807843913976038186342479611344217437134400573561461755382282875626 81
UVM_INFO @ 264597900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7842864641082423799473647782234571184714675910110797919931598707308169378693 87
UVM_INFO @ 8113738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115249877128124160554111905983440130533345678546433827350180005765842742571315 86
UVM_INFO @ 800403231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 3 test runs
gpio_stress_all_with_rand_reset 37479745920566530079014694602138571782799370384975266741623134201525988946551 80
UVM_INFO @ 1232034637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29149539138510717339898905642599737317764021629073856903660063206040171444147 78
UVM_INFO @ 32222753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 67690731538674546416438195920004215908052998442049437238790884119697402270529 186
UVM_INFO @ 1422521394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---