Simulation Results: gpio

 
01/08/2026 02:38:09 DVSim: v1.49.0 sha: 7a3ad34 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.64 %
  • code
  • 98.14 %
  • assert
  • 97.78 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.43 %
Validation stages
V1
100.00%
V2
94.27%
V2S
100.00%
V3
30.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.640s 76.715us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.780s 176.150us 10 10 100.00
gpio_smoke_en_cdc_prim 1.880s 83.678us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.740s 292.217us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.970s 24.267us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.960s 120.272us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.210s 288.330us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.320s 152.705us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.390s 541.563us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.960s 120.272us 5 5 100.00
gpio_csr_aliasing 1.320s 152.705us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.630s 158.021us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.540s 244.338us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.290s 205.893us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.670s 259.396us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 2.720s 102.170us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.490s 187.648us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 25.020s 809.438us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.800s 1874.683us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.410s 347.076us 10 10 100.00
stress_all 1 10 10.00
gpio_stress_all 79.910s 30853.260us 1 10 10.00
alert_test 10 10 100.00
gpio_alert_test 0.950s 58.947us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.960s 11.310us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.240s 62.250us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.240s 62.250us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.960s 120.272us 5 5 100.00
gpio_same_csr_outstanding 1.250s 43.239us 5 5 100.00
gpio_csr_aliasing 1.320s 152.705us 1 1 100.00
gpio_csr_hw_reset 0.970s 24.267us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.960s 120.272us 5 5 100.00
gpio_same_csr_outstanding 1.250s 43.239us 5 5 100.00
gpio_csr_aliasing 1.320s 152.705us 1 1 100.00
gpio_csr_hw_reset 0.970s 24.267us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.920s 263.709us 25 25 100.00
gpio_sec_cm 1.290s 371.591us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.920s 263.709us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 6 10 60.00
gpio_rand_straps 0.940s 33.401us 6 10 60.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 18.300s 607.681us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 13 test runs
gpio_stress_all 21391884546779786505422416740739553674853511646468630519437982977440436145437 2451
UVM_INFO @ 30853259724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 108411776524841027531534770051903555750151776878320671484858693582932536260349 256
UVM_INFO @ 578514669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 23150631840766390690273224073127549785986519320631875525971659898378446503078 75
UVM_INFO @ 1115845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 99297298341415196593665278567877993511118831847130535658083319494462022928327 158
UVM_INFO @ 11293611157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 19166454319968954056211351548188834100175246410994622357235040608606633450821 258
UVM_INFO @ 15436767172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 77644009074562794463628173772207642676920820200424926869972490990613388629228 285
UVM_INFO @ 965196140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 55153385911733640363897990169584118153495899129040484946683385369779693724654 75
UVM_INFO @ 10043178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 111566255710215191356301208183064160854744444433155019773301877055368119236002 489
UVM_INFO @ 1056802990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 88305076572008867509537127694681895131475273301700796555802976062347941891277 288
UVM_INFO @ 6435494468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 33778492314341079519282166643290972561749839224564629084726333448559354026781 75
UVM_INFO @ 8574661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 20894928770663775573585049539261057189210531169250315934246233726111329937773 797
UVM_INFO @ 2806788986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 81560881290392808292096712985709447469915029551210409920774126825222244678217 76
UVM_INFO @ 551537930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 62672988386222052190187924944966498395340760407508141436574132531011674022251 75
UVM_INFO @ 6401545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 6 test runs
gpio_stress_all_with_rand_reset 58345107278018585364967129728927574742412273225196855502080415208814653870829 229
UVM_INFO @ 169723405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3568556596084833894033315664951936229172602164321078867707282625203998347970 174
UVM_INFO @ 51507075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112936054427159048590697827976177874259354027814046014757053967390659910682599 132
UVM_INFO @ 906910314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 80283165884914242929543454264947617436853293542798316594694420850452323191269 123
UVM_INFO @ 741551265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 75598437351163097881797199389877881056508052635886525047539531764739067317067 80
UVM_INFO @ 39910598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48976925122009553687559938597790397399923557623381108786913638707474584916236 80
UVM_INFO @ 4165430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 4 test runs
gpio_stress_all_with_rand_reset 108879059763805647304552580821939883337725445736063745331549965726686824265307 78
UVM_INFO @ 19163201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38868460189545338691534940459257411005165723616125898952345992585184237024485 78
UVM_INFO @ 2280576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 105215481558078533145603190200790676118837513684343150187938500684894095294275 707
UVM_INFO @ 607681232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 71613087582020051491982101197388167577577047262120625965042264864741312556662 79
UVM_INFO @ 237823634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---