Simulation Results: aes/unmasked

 
08/08/2026 02:25:00 DVSim: v1.49.0 sha: d313c71 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 95.94 %
  • code
  • 92.95 %
  • assert
  • 97.92 %
  • func
  • 96.94 %
  • block
  • 93.93 %
  • line
  • 95.29 %
  • branch
  • 87.43 %
  • toggle
  • 97.99 %
  • FSM
  • 91.11 %
Validation stages
V1
100.00%
V2
97.71%
V2S
89.39%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 107.172us 1 1 100.00
smoke 10 10 100.00
aes_smoke 3.000s 275.426us 10 10 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 56.748us 1 1 100.00
csr_rw 5 5 100.00
aes_csr_rw 3.000s 61.744us 5 5 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 462.832us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 331.642us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 59.309us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
aes_csr_rw 3.000s 61.744us 5 5 100.00
aes_csr_aliasing 3.000s 331.642us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 70 70 100.00
aes_smoke 3.000s 275.426us 10 10 100.00
aes_config_error 4.000s 718.944us 50 50 100.00
aes_stress 4.000s 178.159us 10 10 100.00
key_length 70 70 100.00
aes_smoke 3.000s 275.426us 10 10 100.00
aes_config_error 4.000s 718.944us 50 50 100.00
aes_stress 4.000s 178.159us 10 10 100.00
back2back 35 35 100.00
aes_stress 4.000s 178.159us 10 10 100.00
aes_b2b 8.000s 1021.249us 25 25 100.00
backpressure 10 10 100.00
aes_stress 4.000s 178.159us 10 10 100.00
multi_message 94 95 98.95
aes_smoke 3.000s 275.426us 10 10 100.00
aes_config_error 4.000s 718.944us 50 50 100.00
aes_stress 4.000s 178.159us 10 10 100.00
aes_alert_reset 5.000s 191.308us 24 25 96.00
failure_test 84 85 98.82
aes_man_cfg_err 3.000s 340.848us 10 10 100.00
aes_config_error 4.000s 718.944us 50 50 100.00
aes_alert_reset 5.000s 191.308us 24 25 96.00
trigger_clear_test 10 10 100.00
aes_clear 3.000s 184.208us 10 10 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 5.000s 542.493us 1 1 100.00
reset_recovery 24 25 96.00
aes_alert_reset 5.000s 191.308us 24 25 96.00
stress 10 10 100.00
aes_stress 4.000s 178.159us 10 10 100.00
sideload 20 20 100.00
aes_stress 4.000s 178.159us 10 10 100.00
aes_sideload 4.000s 109.630us 10 10 100.00
deinitialization 10 10 100.00
aes_deinit 3.000s 226.993us 10 10 100.00
stress_all 6 10 60.00
aes_stress_all 34.000s 4893.727us 6 10 60.00
alert_test 10 10 100.00
aes_alert_test 2.000s 82.298us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
aes_tl_errors 4.000s 294.047us 25 25 100.00
tl_d_illegal_access 25 25 100.00
aes_tl_errors 4.000s 294.047us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
aes_csr_hw_reset 2.000s 56.748us 1 1 100.00
aes_csr_rw 3.000s 61.744us 5 5 100.00
aes_csr_aliasing 3.000s 331.642us 1 1 100.00
aes_same_csr_outstanding 3.000s 142.237us 5 5 100.00
tl_d_partial_access 12 12 100.00
aes_csr_hw_reset 2.000s 56.748us 1 1 100.00
aes_csr_rw 3.000s 61.744us 5 5 100.00
aes_csr_aliasing 3.000s 331.642us 1 1 100.00
aes_same_csr_outstanding 3.000s 142.237us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 3 10 30.00
aes_reseed 5.000s 426.878us 3 10 30.00
fault_inject 572 660 86.67
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
shadow_reg_update_error 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
shadow_reg_read_clear_staged_value 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
shadow_reg_storage_error 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
shadowed_reset_glitch 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 212.755us 20 20 100.00
tl_intg_err 30 30 100.00
aes_sec_cm 5.000s 622.938us 5 5 100.00
aes_tl_intg_err 4.000s 343.756us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
aes_tl_intg_err 4.000s 343.756us 25 25 100.00
sec_cm_lc_escalate_en_intersig_mubi 24 25 96.00
aes_alert_reset 5.000s 191.308us 24 25 96.00
sec_cm_main_config_shadow 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
sec_cm_gcm_config_shadow 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
sec_cm_main_config_sparse 137 145 94.48
aes_smoke 3.000s 275.426us 10 10 100.00
aes_stress 4.000s 178.159us 10 10 100.00
aes_alert_reset 5.000s 191.308us 24 25 96.00
aes_core_fi 109.000s 10017.077us 93 100 93.00
sec_cm_gcm_config_sparse 153 160 95.62
aes_config_error 4.000s 718.944us 50 50 100.00
aes_stress 4.000s 178.159us 10 10 100.00
aes_core_fi 109.000s 10017.077us 93 100 93.00
sec_cm_aux_config_shadow 19 20 95.00
aes_shadow_reg_errors 22.000s 10002.101us 19 20 95.00
sec_cm_aux_config_regwen 20 20 100.00
aes_readability 2.000s 115.403us 10 10 100.00
aes_stress 4.000s 178.159us 10 10 100.00
sec_cm_key_sideload 20 20 100.00
aes_stress 4.000s 178.159us 10 10 100.00
aes_sideload 4.000s 109.630us 10 10 100.00
sec_cm_key_sw_unreadable 10 10 100.00
aes_readability 2.000s 115.403us 10 10 100.00
sec_cm_data_reg_sw_unreadable 10 10 100.00
aes_readability 2.000s 115.403us 10 10 100.00
sec_cm_key_sec_wipe 10 10 100.00
aes_readability 2.000s 115.403us 10 10 100.00
sec_cm_iv_config_sec_wipe 10 10 100.00
aes_readability 2.000s 115.403us 10 10 100.00
sec_cm_data_reg_sec_wipe 10 10 100.00
aes_readability 2.000s 115.403us 10 10 100.00
sec_cm_data_reg_key_sca 10 10 100.00
aes_stress 4.000s 178.159us 10 10 100.00
sec_cm_key_masking 10 10 100.00
aes_stress 4.000s 178.159us 10 10 100.00
sec_cm_main_fsm_sparse 1 10 10.00
aes_fi 4.000s 141.982us 1 10 10.00
sec_cm_main_fsm_redun 597 685 87.15
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
aes_ctr_fi 7.000s 130.362us 25 25 100.00
sec_cm_cipher_fsm_sparse 1 10 10.00
aes_fi 4.000s 141.982us 1 10 10.00
sec_cm_cipher_fsm_redun 572 660 86.67
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
sec_cm_cipher_ctr_redun 302 350 86.29
aes_cipher_fi 61.000s 0.000us 302 350 86.29
sec_cm_ctr_fsm_sparse 1 10 10.00
aes_fi 4.000s 141.982us 1 10 10.00
sec_cm_ctr_fsm_redun 295 335 88.06
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_ctr_fi 7.000s 130.362us 25 25 100.00
sec_cm_ghash_fsm_sparse 1 10 10.00
aes_fi 4.000s 141.982us 1 10 10.00
sec_cm_ctrl_sparse 597 685 87.15
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
aes_ctr_fi 7.000s 130.362us 25 25 100.00
sec_cm_main_fsm_global_esc 24 25 96.00
aes_alert_reset 5.000s 191.308us 24 25 96.00
sec_cm_main_fsm_local_esc 597 685 87.15
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
aes_ctr_fi 7.000s 130.362us 25 25 100.00
sec_cm_cipher_fsm_local_esc 597 685 87.15
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
aes_ctr_fi 7.000s 130.362us 25 25 100.00
sec_cm_ctr_fsm_local_esc 295 335 88.06
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_ctr_fi 7.000s 130.362us 25 25 100.00
sec_cm_ghash_fsm_local_esc 1 10 10.00
aes_fi 4.000s 141.982us 1 10 10.00
sec_cm_data_reg_local_esc 572 660 86.67
aes_fi 4.000s 141.982us 1 10 10.00
aes_control_fi 60.000s 0.000us 269 300 89.67
aes_cipher_fi 61.000s 0.000us 302 350 86.29
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 16.000s 1688.150us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 32 test runs
aes_cipher_fi 66991109045757330680201098481220884541012077426881105190549284865205938681977 139
UVM_INFO @ 10011552103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 8265675723964671300983676147362977000469716734994453508283869264357126871759 152
UVM_INFO @ 10023769014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 110089511524845760910866757737105263187321911189279264164149694756047562993232 145
UVM_INFO @ 10006277343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 63205764850181631957629552856975226387509813521223753065301560878116711803945 146
UVM_INFO @ 10036302793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 61787362791120601116870489435844073108206024554812087731805488961363255510006 149
UVM_INFO @ 10021968093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 41950912380749542782743175858731278273109272784880646053525284446189391810130 146
UVM_INFO @ 10008385655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 26311567680413152022613155733270453785748102983732862409441963554358698200833 144
UVM_INFO @ 10020958170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 77954307070767922309302369936952937789263598135266683001155899687324822475461 141
UVM_INFO @ 10004720464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 37527697257481474032031740549577592318842186287082599514400383077431528082750 146
UVM_INFO @ 10008382036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 57126726176453283564920640676352693601531148642881581314838173348655091954454 154
UVM_INFO @ 10017788606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 85962344723179924273577582300516119823651680583332349039541987425958596795562 138
UVM_INFO @ 10003871410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 3354352594848095244946510462695593688720325365590920188025413951073448373339 148
UVM_INFO @ 10010505656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 38052541961200665106643431894036914667033639464939121958415199856692895956533 147
UVM_INFO @ 10029081291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 7334826881916856853482297278084552756144474360455403388854338783516021408458 140
UVM_INFO @ 10014945992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 40113080436038935382125201234739079866218964973669656569953471001919898755807 155
UVM_INFO @ 10005842339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 88603787700812227180399954652771587652225575252225258666425287279575565781082 153
UVM_INFO @ 10009110947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 17700904291886755842260210285877042539007176959992556885700822144030518202796 150
UVM_INFO @ 10007518650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 103747584457604453026914639184301758827573297612490358479115406991967081601935 141
UVM_INFO @ 10006189463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 70312409040614114290331272471184260780171988172770773930803385726815561172697 149
UVM_INFO @ 10005988710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 66269967381513129152201422293609438211833652793408401234630365762658137480609 149
UVM_INFO @ 10007340224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 4015138558759553747060978741416629621098880507073132451771714091331739608429 152
UVM_INFO @ 10010328134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 52233920315774393414903426110774761756101531799743118127025601885450194389631 151
UVM_INFO @ 10018042817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 66469384445665131292161643510833360398723848371004202700208904491433430984073 148
UVM_INFO @ 10004235274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 8651605977876478834929091876872580454702523687266657369345375764598917770845 142
UVM_INFO @ 10008367528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 51136919609480128990736212257073373180715319584218700818925973065530804479203 147
UVM_INFO @ 10010154826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 113192376590725393148725978331044592266996677372792552934173895818945606046971 144
UVM_INFO @ 10008681837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 91490659146345854328782839090871664020393536491362091419596964974843428412837 147
UVM_INFO @ 10003200234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 16778649555863174631507389338115013851742925978176712702822680266771017112791 153
UVM_INFO @ 10006360496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 17643218024439553198836808850058836977198810022526782918763218402660072196998 148
UVM_INFO @ 10017089422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 113714344695753020545315401401491628907113693011937792098884930212301630675308 145
UVM_INFO @ 10009173785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 95709037403756857418374905784751494405221810055198322440166231752295543739647 141
UVM_INFO @ 10002731301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 14819163509514082213737578276390305407591906563996595544904335612872312816452 149
UVM_INFO @ 10018365036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 24 test runs
aes_cipher_fi 43797940534565908527091016313099005738595172696709681990001935233839125371360 None
aes_control_fi 55416266522725005561843263089706422368868276399481895764068887692651209595366 None
aes_control_fi 31284839918992232961015497225296008047931718459383701577315173072440664625259 None
aes_cipher_fi 32556740335407465794869700914974351302551885113568194662894653184479832489244 None
aes_control_fi 93871026486145342653333195437909288774156388315434962254038715920490781637220 None
aes_cipher_fi 79969057380685816209111840853051381968211394820845315980350839637153440214390 None
aes_cipher_fi 29068794638369102271676958241941141939478842845876306129443259745910771067766 None
aes_cipher_fi 91152103051788008151500316155591798801858266579035309559263089748759713648671 None
aes_cipher_fi 82628917778986838692581286504724397512737400562480269041663594498182498500501 None
aes_control_fi 89056268413536743788738093131990932882986223151865353403428862176447565882801 None
aes_cipher_fi 109379120964579647708312668765666495694974256338562372579141727844233613516390 None
aes_control_fi 71566584742645436130776657653774853741356526098983196154159355760262025053272 None
aes_control_fi 28634314244726900888393541461781235450404242540889826714838248704889459001984 None
aes_control_fi 3893525691574925881704823436431508144450872834417779966273022092162820940740 None
aes_cipher_fi 60675454319065697033459431910814645880844431120034481961978577179967386542388 None
aes_cipher_fi 15315056937048409111774911082072627412683894594147332888077032235309078030628 None
aes_cipher_fi 112865152727393106153849652727933694777358076372699390796446780526961818462155 None
aes_cipher_fi 77814988954300408415802900521328624828038300659135887390456572866558020247050 None
aes_cipher_fi 61663893553950506071717794486070976515045673195969573851719142989069261775288 None
aes_cipher_fi 108459774781181376565043408793431783124933577333986093837984341028781240502758 None
aes_control_fi 83231504119608661082814014970267980346862362406483359013733522568676587327056 None
aes_cipher_fi 82341445347283747288767033166590833700624571231985808871697754230439362096468 None
aes_cipher_fi 73034165276819881235255222608028323514738644876849430167687422147446849674887 None
aes_cipher_fi 37417420789612676195076200431084249615897604865052639078114697605785813420907 None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 23 test runs
aes_control_fi 74294128706950710982849167090703583778186451202386423261327734865038328377049 145
UVM_INFO @ 10010599348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 84238154313705479445594307938296359815357898816940099527802162423518960433882 144
UVM_INFO @ 10005148363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 98526225850975033123194695232846197426366440474627925151744532363903246257411 144
UVM_INFO @ 10009536890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 113783064156431475406641850420944931021317274175806075018319835764341839787343 143
UVM_INFO @ 10007817843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 61733644336746884432756533280267453586279433631051818658211432089998850977307 148
UVM_INFO @ 10003263590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 20924376642563854434844171688780924300491121054876090764446764021924460685826 144
UVM_INFO @ 10009998795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 94649404538693105530331466543320785396067964910694062797905049927003612854761 140
UVM_INFO @ 10020342330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 70411337276448467932037093690137219462926549959119762359469064608929946356125 144
UVM_INFO @ 10004005802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 8949282424421422129530541875268206854013887148663948416563997259232797682637 142
UVM_INFO @ 10002936402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 47823030931671248994179328203287200960635130610885337569270582438080509155373 141
UVM_INFO @ 10015867126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 23892888412637903913038241445998936730560374765570706789252640856270142960847 140
UVM_INFO @ 10005285098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 69382079227572166404930374582908566559969248270561013464161830790548782788342 152
UVM_INFO @ 10002718450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 19706348152967687437475038464926958002454935139436335078444012576031432922337 150
UVM_INFO @ 10009331192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 62181817379325748553726003285439545204611192810830572728400889918006745652991 142
UVM_INFO @ 10011862063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 7545735120742680658198056188275552167954950685173932570132760729523684136952 146
UVM_INFO @ 10008326367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 84725382754556984391481756024903153259711639083569450794470078707578452052822 152
UVM_INFO @ 10013523412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 45067360505747799836243891551013430361011270846894426789356658357662473918820 142
UVM_INFO @ 10026516029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 54606782146796194281157074870289820912082620646980163942938145544285481827125 147
UVM_INFO @ 10008264182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 62967166947084505445570590001501285360766013538469964163092513288572010501396 139
UVM_INFO @ 10004858697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 27825829355373922241510936465937057775498587061116594600128482454841142943467 141
UVM_INFO @ 10010616180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 3456094470225427141506850229824433928181437707331037942319808502423301074253 148
UVM_INFO @ 10018122821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 26742402116739292771913255686414227377895513886631572407431984243938849287687 138
UVM_INFO @ 10028864196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 11496114409057796784150142797746980101329076551890879497137263321251022973224 150
UVM_INFO @ 10055054597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 15 test runs
aes_reseed 89050927146360769069946769284409556044487661990606049965409995200144700943092 4877
UVM_INFO @ 65173817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 15024551400531691779370864974238453178557880034348377839200448798669745661763 3935
UVM_INFO @ 386113708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 63337592036141260717472112087828921236327413413450144038046168506150961000453 96851
UVM_INFO @ 4893727206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 24076294974563151294526334382016652591673615066770093221452283056851346718375 517
UVM_INFO @ 2466471829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 101734763354720571391915282160270268687439141111092351708468879185360501518750 13329
UVM_INFO @ 448574602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 50716528489981957261855040198795908355784151323314193008051432650611607580785 903
UVM_INFO @ 1160836594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 113430295760727680806719462739553295050077074690701055349280729581077724608455 155
UVM_INFO @ 253424868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 110581612797607222034596267072596606010704267257233458445510909748933239897238 1883
UVM_INFO @ 8083114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 57890288543497621947518184907269666347919823448418909789229719147655795861599 4342
UVM_INFO @ 29145053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 96006658627694209853798333380763510433881578646665058355129986096682481585957 12038
UVM_INFO @ 426878212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 57752160922330886904380052610635846418442414215995892344076059016549658681816 480
UVM_INFO @ 2524150204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 104014046367883647837257074961548312664416399267714359315427396878346178982399 5007
UVM_INFO @ 52559580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_reseed 67076948235102124215630297391546402417333056306710044436587670232615030227381 6060
UVM_INFO @ 19778394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 76427886684589871966415431515045355629559484492379780541245899213637571645121 23634
UVM_INFO @ 398123403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all 84916635327687869624341468020884907216292848947904213408876483762985321348450 2118
UVM_INFO @ 82014170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 9 test runs
aes_fi 106052807196926733241611329271320205022266166290254439676484084211127360579092 4596
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 1
----| Expected corrupted: 0
aes_fi 37465681839855953386457556608062675894718562816824003067219196388673380607787 3478
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
aes_fi 64619682890398685287210600901377354106434953431888271520494160688598798132025 6373
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 110829634706291332711578783941161365350825852634643405688067941842668028267887 6015
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 15392117972690897782960839535727611343181884676491874263911635360407327570456 6710
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_fi 44936753984832659756238286809122669818712932542954043146433397288721279891959 5531
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
aes_fi 78750756890103539123412668695586782647660653183341472535798583154269083707369 7027
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
aes_fi 42897826793322488131481930127865710413855570662708367894534609217295128025531 3808
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
aes_fi 74055025685314507868572361703057632016921502568980083229942008300052628904940 2680
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 6 test runs
aes_core_fi 32103104990404746709792910598923206073732006410997059265020446785460138524058 145
UVM_INFO @ 10003590943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 99465904867334855751854766690815643554813925467694803296187565782591540238765 146
UVM_INFO @ 10005012392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 108802346548333520404235708560774803926975613772903372080355316844665552926070 146
UVM_INFO @ 10027652422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 19750663615146976138276406777160539161970724014421143814153455846243806783988 145
UVM_INFO @ 10022518860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 45273527769688529247901805945217496431642486634049599265731905233575679325985 147
UVM_INFO @ 10007335107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 102954746834514848180704588895534938671390960780206618498075517494836085075597 142
UVM_INFO @ 10003551127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 5 test runs
aes_stress_all_with_rand_reset 89052200539492564629868130525616977889854130627347122153396961087938035161775 152
UVM_INFO @ 12220373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 45143419596421494412128723452588189601738858088787970559963221771201157528088 135
UVM_INFO @ 6214612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 62315600536981898168169720178061680861380811030673598242056524630948800088993 135
UVM_INFO @ 50171494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 11371367073121794882509343362691409949389959428060315764300778457681823088616 636
UVM_INFO @ 1688149812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 74263449959022968372628784513678662443142948651151822338054494183256832462428 216
UVM_INFO @ 48729769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1137): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) 1 test run
aes_alert_reset 64202572767571813456811544598903214132829792671357447412120194667956877177935 1479
UVM_ERROR @ 11591357 ps: (aes_core.sv:1137) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_INFO @ 11591357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) 1 test run
aes_core_fi 69553191549466189880186087996782808658696755241223461606385530847216384682432 144
UVM_INFO @ 10017077086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 31060808477228154711555359287087970072945142468439241111686813544410218808624 109
UVM_INFO @ 5328977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq__shadow_reg_errors.svh:336) [aes_common_vseq] ctrl_shadowed update_err alert timeout 1 test run
aes_shadow_reg_errors 111781446684331755828156074101748318155519934074130184540509289472419320625210 106
UVM_INFO @ 10002100715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---