Simulation Results: rom_ctrl/32kb

 
08/08/2026 02:25:00 DVSim: v1.49.0 sha: d313c71 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.58 %
  • code
  • 92.63 %
  • assert
  • 97.82 %
  • func
  • 99.28 %
  • line
  • 98.66 %
  • branch
  • 99.27 %
  • cond
  • 96.58 %
  • toggle
  • 95.33 %
  • FSM
  • 73.33 %
Validation stages
V1
100.00%
V2
95.77%
V2S
66.10%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
rom_ctrl_smoke 3.570s 964.390us 2 2 100.00
csr_hw_reset 1 1 100.00
rom_ctrl_csr_hw_reset 2.680s 75.676us 1 1 100.00
csr_rw 5 5 100.00
rom_ctrl_csr_rw 3.440s 52.190us 5 5 100.00
csr_bit_bash 1 1 100.00
rom_ctrl_csr_bit_bash 2.710s 66.674us 1 1 100.00
csr_aliasing 1 1 100.00
rom_ctrl_csr_aliasing 1.960s 72.897us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
rom_ctrl_csr_mem_rw_with_rand_reset 2.980s 71.647us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
rom_ctrl_csr_rw 3.440s 52.190us 5 5 100.00
rom_ctrl_csr_aliasing 1.960s 72.897us 1 1 100.00
mem_walk 1 1 100.00
rom_ctrl_mem_walk 1.780s 51.803us 1 1 100.00
mem_partial_access 1 1 100.00
rom_ctrl_mem_partial_access 2.070s 49.955us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
max_throughput_chk 0 2 0.00
rom_ctrl_max_throughput_chk 1.800s 4.906us 0 2 0.00
stress_all 19 20 95.00
rom_ctrl_stress_all 10800.119s 0.000us 19 20 95.00
kmac_err_chk 2 2 100.00
rom_ctrl_kmac_err_chk 5.670s 719.884us 2 2 100.00
alert_test 10 10 100.00
rom_ctrl_alert_test 2.940s 85.383us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
rom_ctrl_tl_errors 10.040s 1043.237us 25 25 100.00
tl_d_illegal_access 25 25 100.00
rom_ctrl_tl_errors 10.040s 1043.237us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
rom_ctrl_csr_hw_reset 2.680s 75.676us 1 1 100.00
rom_ctrl_csr_rw 3.440s 52.190us 5 5 100.00
rom_ctrl_csr_aliasing 1.960s 72.897us 1 1 100.00
rom_ctrl_same_csr_outstanding 4.990s 64.776us 5 5 100.00
tl_d_partial_access 12 12 100.00
rom_ctrl_csr_hw_reset 2.680s 75.676us 1 1 100.00
rom_ctrl_csr_rw 3.440s 52.190us 5 5 100.00
rom_ctrl_csr_aliasing 1.960s 72.897us 1 1 100.00
rom_ctrl_same_csr_outstanding 4.990s 64.776us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
corrupt_sig_fatal_chk 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
passthru_mem_tl_intg_err 5 5 100.00
rom_ctrl_passthru_mem_tl_intg_err 14.280s 1728.048us 5 5 100.00
tl_intg_err 30 30 100.00
rom_ctrl_sec_cm 263.150s 1347.299us 5 5 100.00
rom_ctrl_tl_intg_err 57.340s 2305.100us 25 25 100.00
prim_fsm_check 5 5 100.00
rom_ctrl_sec_cm 263.150s 1347.299us 5 5 100.00
prim_count_check 5 5 100.00
rom_ctrl_sec_cm 263.150s 1347.299us 5 5 100.00
sec_cm_checker_ctr_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_checker_ctrl_flow_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_checker_fsm_local_esc 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_compare_ctrl_flow_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_compare_ctr_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_compare_ctr_redun 5 5 100.00
rom_ctrl_sec_cm 263.150s 1347.299us 5 5 100.00
sec_cm_fsm_sparse 5 5 100.00
rom_ctrl_sec_cm 263.150s 1347.299us 5 5 100.00
sec_cm_mem_scramble 2 2 100.00
rom_ctrl_smoke 3.570s 964.390us 2 2 100.00
sec_cm_mem_digest 2 2 100.00
rom_ctrl_smoke 3.570s 964.390us 2 2 100.00
sec_cm_intersig_mubi 2 2 100.00
rom_ctrl_smoke 3.570s 964.390us 2 2 100.00
sec_cm_bus_integrity 25 25 100.00
rom_ctrl_tl_intg_err 57.340s 2305.100us 25 25 100.00
sec_cm_bus_local_esc 2 22 9.09
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
rom_ctrl_kmac_err_chk 5.670s 719.884us 2 2 100.00
sec_cm_mux_mubi 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_mux_consistency 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_ctrl_redun 0 20 0.00
rom_ctrl_corrupt_sig_fatal_chk 3600.117s 0.000us 0 20 0.00
sec_cm_ctrl_mem_integrity 5 5 100.00
rom_ctrl_passthru_mem_tl_intg_err 14.280s 1728.048us 5 5 100.00
sec_cm_tlul_fifo_ctr_redun 5 5 100.00
rom_ctrl_sec_cm 263.150s 1347.299us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 20 20 100.00
rom_ctrl_stress_all_with_rand_reset 449.490s 24722.162us 20 20 100.00

Error Messages

   Test seed line log context
Job timed out after * minutes 11 test runs
rom_ctrl_corrupt_sig_fatal_chk 4703452074735425288622733220739318572167245758029748362526148704822344192043 None
rom_ctrl_corrupt_sig_fatal_chk 36526597564630184803116992032278413820499512256321983781370336903778874258459 None
rom_ctrl_corrupt_sig_fatal_chk 105257074025420217261080396682540987253136400147581989047617248821901024597523 None
rom_ctrl_corrupt_sig_fatal_chk 26966599660566645134891877293772778137506520758079699708491711460670380137803 None
rom_ctrl_corrupt_sig_fatal_chk 94130800436847860249135325542095636020808818419713647635276240967728740751015 None
rom_ctrl_corrupt_sig_fatal_chk 28777031100328762367980671691532125359156273366964211810419123908384957480683 None
rom_ctrl_stress_all 34582911265648289781264118745186166732808371215081103422286169838975369013793 None
rom_ctrl_corrupt_sig_fatal_chk 6209910445333697773455734374098654839062460195051586733813328498967584906784 None
rom_ctrl_corrupt_sig_fatal_chk 83226768241261585945471523305354643592468150222400174362865704169080963851132 None
rom_ctrl_corrupt_sig_fatal_chk 86777306169319437517598955518911534073929403460456371740264111405740605741737 None
rom_ctrl_corrupt_sig_fatal_chk 52681312145156177056447100513782589497053888577342752053220704428842430258508 None
UVM_ERROR (cip_base_vseq.sv:1047) virtual_sequencer [rom_ctrl_corrupt_sig_fatal_chk_vseq] Expected alert (fatal) did not fire in * cycles. 4 test runs
rom_ctrl_corrupt_sig_fatal_chk 95776242221808631583432324175002998785158084411682349457097214527006832571756 78
UVM_INFO @ 13950491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_corrupt_sig_fatal_chk 103219845165569963163686785399159639164735894612312986022943974031229811632076 82
UVM_INFO @ 122828265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_corrupt_sig_fatal_chk 94309694931253741396927494037463612550639793256909548513733559309028620056276 78
UVM_INFO @ 46016484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_corrupt_sig_fatal_chk 115666461163056170689425464696703037082021820410292692905575069576288365895087 82
UVM_INFO @ 26109773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rom_ctrl_corrupt_sig_fatal_chk_vseq.sv:148) [rom_ctrl_corrupt_sig_fatal_chk_vseq] Check failed (cfg.rom_ctrl_vif.pwrmgr_data.done != MuBi4True) 3 test runs
rom_ctrl_corrupt_sig_fatal_chk 107109524746700519180288833298628902348345008517413902522053111839070733391902 82
UVM_INFO @ 334474730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_corrupt_sig_fatal_chk 47267628709768679043393202157683388553968188870269736280252252960324995566491 82
UVM_INFO @ 357810416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_corrupt_sig_fatal_chk 84806306871104894458016112420653336522473472148974291914321981526801289708725 85
UVM_INFO @ 178769583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rom_ctrl_throughput_vseq.sv:52) [rom_ctrl_throughput_vseq] Check failed num_cycles == num_mem_reads + * (* [*] vs * [*]) 2 test runs
rom_ctrl_max_throughput_chk 93759553173164107409573642199512622926482997484055370366356353342341837065123 79
UVM_INFO @ 4224297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rom_ctrl_max_throughput_chk 37058072168578551071313397737859577670338531659541303386913132378178512415849 79
UVM_INFO @ 4906307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rom_ctrl_corrupt_sig_fatal_chk_vseq.sv:278) [rom_ctrl_corrupt_sig_fatal_chk_vseq] Check failed (cfg.fsm_vif.get_fsm_state() == rom_ctrl_pkg::ReadingLow) 1 test run
rom_ctrl_corrupt_sig_fatal_chk 71878438537842882604968571704162855453951413990610416547847821732479504659926 98
UVM_INFO @ 192458649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rom_ctrl_corrupt_sig_fatal_chk_vseq.sv:295) [rom_ctrl_corrupt_sig_fatal_chk_vseq] Check failed (cfg.compare_vif.is_waiting()) 1 test run
rom_ctrl_corrupt_sig_fatal_chk 59580102557355093768629994218914137322187408823623487788128086185850384837418 84
UVM_INFO @ 48743696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rom_ctrl_scoreboard.sv:303) scoreboard [wrong_pwrmgr_good] rom_ctrl is reporting good=* (MuBi4True) to the pwrmgr, but we expected * (MuBi4False). 1 test run
rom_ctrl_corrupt_sig_fatal_chk 59038562273129081697206526872006534371790908118592759699002741620633124484993 96
UVM_INFO @ 1724142165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---