| V1 |
|
100.00% |
| V2 |
|
96.79% |
| V2S |
|
91.73% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 3.000s | 146.715us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 3.000s | 80.496us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 176.821us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 3.000s | 169.193us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 4.000s | 262.112us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 3.000s | 205.328us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 2.000s | 111.482us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 3.000s | 169.193us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 205.328us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 3.000s | 80.496us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 250.333us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 3.000s | 80.496us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 250.333us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| aes_b2b | 8.000s | 417.112us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| multi_message | 95 | 95 | 100.00 | |||
| aes_smoke | 3.000s | 80.496us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 250.333us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| aes_alert_reset | 5.000s | 380.469us | 25 | 25 | 100.00 | |
| failure_test | 85 | 85 | 100.00 | |||
| aes_man_cfg_err | 3.000s | 71.623us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 250.333us | 50 | 50 | 100.00 | |
| aes_alert_reset | 5.000s | 380.469us | 25 | 25 | 100.00 | |
| trigger_clear_test | 10 | 10 | 100.00 | |||
| aes_clear | 3.000s | 153.849us | 10 | 10 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 5.000s | 279.541us | 1 | 1 | 100.00 | |
| reset_recovery | 25 | 25 | 100.00 | |||
| aes_alert_reset | 5.000s | 380.469us | 25 | 25 | 100.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| aes_sideload | 3.000s | 84.145us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 3.000s | 68.627us | 10 | 10 | 100.00 | |
| stress_all | 3 | 10 | 30.00 | |||
| aes_stress_all | 13.000s | 923.332us | 3 | 10 | 30.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 3.000s | 104.519us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 513.847us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 4.000s | 513.847us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 176.821us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 169.193us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 205.328us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 105.804us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 176.821us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 169.193us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 3.000s | 205.328us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 105.804us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 6 | 10 | 60.00 | |||
| aes_reseed | 4.000s | 207.816us | 6 | 10 | 60.00 | |
| fault_inject | 595 | 660 | 90.15 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| shadow_reg_update_error | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| shadow_reg_read_clear_staged_value | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| shadow_reg_storage_error | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| shadowed_reset_glitch | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| shadow_reg_update_error_with_csr_rw | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 4.000s | 323.359us | 18 | 20 | 90.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 5.000s | 663.262us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 4.000s | 1155.725us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 4.000s | 1155.725us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 25 | 25 | 100.00 | |||
| aes_alert_reset | 5.000s | 380.469us | 25 | 25 | 100.00 | |
| sec_cm_main_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| sec_cm_gcm_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| sec_cm_main_config_sparse | 136 | 145 | 93.79 | |||
| aes_smoke | 3.000s | 80.496us | 10 | 10 | 100.00 | |
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| aes_alert_reset | 5.000s | 380.469us | 25 | 25 | 100.00 | |
| aes_core_fi | 33.000s | 10045.499us | 91 | 100 | 91.00 | |
| sec_cm_gcm_config_sparse | 151 | 160 | 94.38 | |||
| aes_config_error | 4.000s | 250.333us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| aes_core_fi | 33.000s | 10045.499us | 91 | 100 | 91.00 | |
| sec_cm_aux_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 176.174us | 19 | 20 | 95.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 2.000s | 65.951us | 10 | 10 | 100.00 | |
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| aes_sideload | 3.000s | 84.145us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 2.000s | 65.951us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 2.000s | 65.951us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 2.000s | 65.951us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 2.000s | 65.951us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 2.000s | 65.951us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 185.231us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| sec_cm_main_fsm_redun | 620 | 685 | 90.51 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| aes_ctr_fi | 3.000s | 57.638us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| sec_cm_cipher_fsm_redun | 595 | 660 | 90.15 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| sec_cm_cipher_ctr_redun | 320 | 350 | 91.43 | |||
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| sec_cm_ctr_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| sec_cm_ctr_fsm_redun | 300 | 335 | 89.55 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_ctr_fi | 3.000s | 57.638us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| sec_cm_ctrl_sparse | 620 | 685 | 90.51 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| aes_ctr_fi | 3.000s | 57.638us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_global_esc | 25 | 25 | 100.00 | |||
| aes_alert_reset | 5.000s | 380.469us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_local_esc | 620 | 685 | 90.51 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| aes_ctr_fi | 3.000s | 57.638us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 620 | 685 | 90.51 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| aes_ctr_fi | 3.000s | 57.638us | 25 | 25 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 300 | 335 | 89.55 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_ctr_fi | 3.000s | 57.638us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 1 | 10 | 10.00 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| sec_cm_data_reg_local_esc | 595 | 660 | 90.15 | |||
| aes_fi | 4.000s | 206.050us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 274 | 300 | 91.33 | |
| aes_cipher_fi | 61.000s | 0.000us | 320 | 350 | 91.43 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 13.000s | 2162.836us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 24 test runs | |||
| aes_cipher_fi | 78979777240865552867605527350018709215900313717437580294135368953967816123640 | 145 |
UVM_INFO @ 10007288142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 66410963701127061303457671069861390797363523332596905551290050792755656953742 | 150 |
UVM_INFO @ 10048055152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 33468917676127658984793495569365105155089011380298468132211162486337983270766 | 148 |
UVM_INFO @ 10008245195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 111413374488109919026963102436859442233338554957336183123173447907477554800635 | 148 |
UVM_INFO @ 10003804720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 84147043872512690808612294689692150224875220437952772951178400421410580571360 | 146 |
UVM_INFO @ 10008463580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 105731543859335693682166401408835057465029128936379500350375549823856489923934 | 154 |
UVM_INFO @ 10007179211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 91115196343905307076383196225676480710968800909062823411901221330573340288298 | 153 |
UVM_INFO @ 10004491236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 98538182254254396896895358637705010494275891366156629004358171781411571052170 | 144 |
UVM_INFO @ 10005202817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 46173102798834908265966074882760489884685655066860489461057637338402642831823 | 147 |
UVM_INFO @ 10013048232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 8050265537912390005849532142243939022160876216296890651569056284504472085396 | 144 |
UVM_INFO @ 10014115958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 109990833257202303231388548346167429636675936062657139077845055264403910827719 | 147 |
UVM_INFO @ 10003960122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 30927066558373929267093482007041130474896584733759281436639197216473852142740 | 147 |
UVM_INFO @ 10014388132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 67380537598132054201882620010104002549805187946219411199828104915576669674014 | 140 |
UVM_INFO @ 10008770726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 27717823399893424571560910829134161120048160480655462974171625880397670404658 | 140 |
UVM_INFO @ 10006149007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 21059209190182942991282109248921566353314847422975140065236963073099422953468 | 142 |
UVM_INFO @ 10015788308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 76300284719407028986991489880498021424818676369945035164604827686813746143963 | 138 |
UVM_INFO @ 10009845976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 45492668549700153015001467909645844597120402023041953976196832501410877463085 | 145 |
UVM_INFO @ 10015526466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 58396193114366150583414407901697762514775738954973668924615356710440607448386 | 153 |
UVM_INFO @ 10038426596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 73977883767781986822488772592365311830860662099489328304225898747849232791055 | 149 |
UVM_INFO @ 10003927010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 5851402816460196419055248516856653527625181192800476677472412473876095330064 | 149 |
UVM_INFO @ 10009244528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 15676464567775993462688605985321602334322058605120431321151034349401556696131 | 143 |
UVM_INFO @ 10008568420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 52830787583111634726024599398279189502506994476376305940358009975884698909956 | 138 |
UVM_INFO @ 10005955032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 63075891694867534814910856935864204867256356384586245252940781047259411393085 | 145 |
UVM_INFO @ 10006211867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 78398095665122405076924746771856827968243143559359881530641678216328708959454 | 149 |
UVM_INFO @ 10020623312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 17 test runs | |||
| aes_control_fi | 110867017923513849041591336142894588846843449550261088211887285174547083207829 | 146 |
UVM_INFO @ 10012440592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 114065679550883655234510952490340521013179386737993626686042252756442527332511 | 149 |
UVM_INFO @ 10051980277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 105940220233143123806819920878274555309220948752127430023133018038564109134563 | 140 |
UVM_INFO @ 10003523069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 47063537228781621823131207344462247579532759732787516214460084173861338237749 | 136 |
UVM_INFO @ 10004328960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 97407343455074396505124836336377094876048246713557592142620212990802622509546 | 149 |
UVM_INFO @ 10008711584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 87362045523137727232641056257478910069130523507393625225811634995286072467807 | 147 |
UVM_INFO @ 10011572474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 34496543344420936344727222056523644086016957558796783845113031402690684744252 | 139 |
UVM_INFO @ 10004476422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 109557243240258899336777158446724860305091612380350210549885965417186170294652 | 149 |
UVM_INFO @ 10002548500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 17123272760061077581859212189334783817690629015100147056711116860712519738701 | 143 |
UVM_INFO @ 10005506508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 43549805306168523477266191360756781249864030940334233304052202687526761708073 | 137 |
UVM_INFO @ 10007006902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 23850654415743742097035928030019963353137980268513002071969686023391418649678 | 153 |
UVM_INFO @ 10009845354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 70506733483480504030459965242859068540802499282638505666269519445140328574382 | 148 |
UVM_INFO @ 10016229115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 111122602215398346499200463723157595633352380585878113771773081211030516486762 | 142 |
UVM_INFO @ 10050145980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 29834924584247163520382918348041998281594504120590998739862587726644014027 | 149 |
UVM_INFO @ 10015752400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 97735975100882201672139605924843552577926916096325556280316722169413115183760 | 155 |
UVM_INFO @ 10026791802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 110044549845548037311636099474399245949365511089695269419044556319279884166862 | 139 |
UVM_INFO @ 10009003779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 83874649399471247338237810925431308732106335169650276889485491455088272447969 | 152 |
UVM_INFO @ 10006135640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | 14 test runs | |||
| aes_cipher_fi | 8861413525556106666096582811412205909168174857898394666550264321066733625436 | None | ||
| aes_control_fi | 74966915257966232483981045422575658367694774245946813279408494705434927095289 | None | ||
| aes_control_fi | 99749747374537379415400231026007792412933718214367298353788139870192539397844 | None | ||
| aes_control_fi | 97834710871398750515154736885203609782816519350598470847465559584396403687703 | None | ||
| aes_control_fi | 45071846938521664967443862357164579722224759025724550229279010224869115591274 | None | ||
| aes_control_fi | 25185402073554573395133397528886536685797021667524664975123753021272506758360 | None | ||
| aes_control_fi | 98438072544977932280314619713768841140614507088632249336491398187575556127065 | None | ||
| aes_cipher_fi | 81489867295526987569863234865417326778779269731794836564674897304214125490510 | None | ||
| aes_cipher_fi | 53295215632119775447073303649537269694313481478757144872387711372278595987414 | None | ||
| aes_cipher_fi | 83355704196634144904780315631997484464404966832804195438342281571521025888134 | None | ||
| aes_control_fi | 87224584198840916003645357288874821801245040315108610753193977835182613966063 | None | ||
| aes_control_fi | 4093137250833646661674478297173542988997303154601740130760552118747371641551 | None | ||
| aes_cipher_fi | 4987767082400536416028516064473245884363254769036665768088524419837108935875 | None | ||
| aes_cipher_fi | 62437120122193264648392340000968314626992084339337028097203157255247403042458 | None | ||
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 11 test runs | |||
| aes_stress_all_with_rand_reset | 23091950948680766681896588291126784055525431282351234406436436024911637267371 | 149 |
UVM_INFO @ 68215857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 5330381719190271454144626626601405948752779497281906948930570158765171947711 | 5663 |
UVM_INFO @ 154878762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 111964289330349290111215998521561569647171743562777243407614588684637167135361 | 40746 |
UVM_INFO @ 802523288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 83446829767600341999965971693443289333082037559405498721737899983865524570054 | 3773 |
UVM_INFO @ 34037016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 45552892797080742268938701425113685558983328305202392576217148907804291547384 | 304 |
UVM_INFO @ 1076952080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 29966171452391593227247948258768893031551094653860749692711774795993011042333 | 18028 |
UVM_INFO @ 449590946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 71980350043303220860035614685450329278149792838995369779925862940320911956411 | 3110 |
UVM_INFO @ 300528689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 46282057179447350205783049089177794832277546759565963260128811532561685327447 | 41411 |
UVM_INFO @ 288375105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 92409166893761576119324675337030938373364102782835197819388468998823879397613 | 3321 |
UVM_INFO @ 98055749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 24354634595924799900443477126090752910320280613890392991041757438484156544597 | 2077 |
UVM_INFO @ 58404036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 27887376308081630873922662757246780685233203047525058223079347348978682837849 | 11414 |
UVM_INFO @ 386828030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] | 9 test runs | |||
| aes_fi | 103297356904407453657543451622907284982254936876830006979700711993665717356012 | 5319 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 94648256433240670674287164748204321356556673742777117249949613758185399899423 | 9214 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 102051208848389772313413493769335937330259150352036504691907233946741117292845 | 2439 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 99911893846667515777640440044259591722069818580678564686656058546334845228624 | 3887 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 65209554871626266281424059291390706724017174380080464847758961050926950977411 | 5812 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 12651259820505311529956474443505477818606866793247447426846903393739688111511 | 4939 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
|
|
| aes_fi | 105919250814608872799514567107176921716476510505360007678065751849899964608212 | 4758 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 62995539977494108833766558702374492896697466139324629175876309402278612290033 | 6968 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 82865964315149927874494521952999744992672330538065322881570946175190105274697 | 4196 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) | 6 test runs | |||
| aes_stress_all_with_rand_reset | 58726316267787690565330124681778878083876119419448593938170445275130992482031 | 163 |
UVM_INFO @ 13599069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 105328486222906162367981286932281888135765035598651425550921516576734666517935 | 434 |
UVM_INFO @ 6565895165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 103079286183813085254746487261741084595440317394139171211028393726669566441121 | 509 |
UVM_INFO @ 2162836285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 53261076808793342912153874580467621659646917627267043700984603469832199396279 | 229 |
UVM_INFO @ 771294146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 100835144673828967937569706702348375221566058260784570476650514942723001083855 | 142 |
UVM_INFO @ 9605324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 9807166127863142512661482895284275582160291715039378414266875557856029072514 | 175 |
UVM_INFO @ 34063305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 6 test runs | |||
| aes_core_fi | 113078679024965909744986409484706322140058218128939103655602918605289167289122 | 149 |
UVM_INFO @ 10005216393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 58716365629883588244800572194527975517355072436730601539990308389891230095808 | 143 |
UVM_INFO @ 10008341895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 84059743918182992854226535262222176194501658989924764811873609428121632886889 | 140 |
UVM_INFO @ 10007820734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 89999538855859742212628105490931716820392965436139033468623814373132071872351 | 142 |
UVM_INFO @ 10006400866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 58617076520747023386448294113897173810129251592519301073323446534422121773098 | 149 |
UVM_INFO @ 10006967286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 6554690041497329581521075651866043806626136095501423501378639046045526614575 | 149 |
UVM_INFO @ 10004253051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:463) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: aes_reg_block_extended.ctrl_shadowed reset value: * | 3 test runs | |||
| aes_shadow_reg_errors | 34048295051258415637694649905757377415600099241699526610258394993213988769149 | 106 |
UVM_INFO @ 22430437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_shadow_reg_errors_with_csr_rw | 42197039994621061063734470085687747164033090310188904197185973079429773509623 | 106 |
UVM_INFO @ 126894895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_shadow_reg_errors_with_csr_rw | 45521486893379798753902325715740151470204933703443231435000311239160125523164 | 106 |
UVM_INFO @ 24068508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error | 1 test run | |||
| aes_stress_all | 106192033869749379633896655779610172800948662214424977488595981111565629810130 | 7691 |
UVM_INFO @ 74778379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) | 1 test run | |||
| aes_core_fi | 66484205219105183336287873972154149018407857984010295414609867265779280660286 | 140 |
UVM_INFO @ 10045499408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:782) scoreboard [scoreboard] # * | 1 test run | |||
| aes_stress_all | 55963841900525530087713293121975464666683631954971244571631297961571651878028 | 5479 |
TEST FAILED MESSAGES DID NOT MATCH
0 e6 74 74 0
1 00 40 40 0
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 49178845196837472213908321970311431360369815733054676770635170221953534483540 | 111 |
UVM_INFO @ 15197058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 58796219936284052492747686456778129269271490251102499418800003646819190808351 | 109 |
UVM_INFO @ 3133948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:93) [aes_core_fi_vseq] wait timeout occurred! | 1 test run | |||
| aes_core_fi | 94681644907061619940282857764078859058074912853906179661761575871486749938207 | 143 |
UVM_INFO @ 10010569480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) | 1 test run | |||
| aes_core_fi | 25907341647191604680875890388100215072468721481986108317335315291278493797477 | 145 |
UVM_INFO @ 10104126760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 1 test run | |||
| aes_control_fi | 97688487000231117343302159397250592568239044389137022837074009054659436517670 | 156 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|