Simulation Results: gpio

 
15/08/2026 02:51:09 DVSim: v1.49.0 sha: e6fb888 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.66 %
  • code
  • 94.88 %
  • assert
  • 98.10 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.42 %
  • toggle
  • 80.52 %
Validation stages
V1
100.00%
V2
94.27%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.760s 59.200us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.820s 305.727us 10 10 100.00
gpio_smoke_en_cdc_prim 1.910s 114.058us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.790s 227.882us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.980s 160.285us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.970s 12.529us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.590s 82.292us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.300s 35.429us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.300s 137.063us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.970s 12.529us 5 5 100.00
gpio_csr_aliasing 1.300s 35.429us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.420s 143.533us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.600s 190.990us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.340s 56.068us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.850s 215.494us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.140s 253.902us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.230s 157.481us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 30.400s 11370.184us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.230s 634.108us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.440s 585.362us 10 10 100.00
stress_all 1 10 10.00
gpio_stress_all 92.180s 15683.525us 1 10 10.00
alert_test 10 10 100.00
gpio_alert_test 0.910s 117.693us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.980s 12.582us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 4.190s 241.090us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 4.190s 241.090us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.970s 12.529us 5 5 100.00
gpio_same_csr_outstanding 1.190s 19.426us 5 5 100.00
gpio_csr_aliasing 1.300s 35.429us 1 1 100.00
gpio_csr_hw_reset 0.980s 160.285us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.970s 12.529us 5 5 100.00
gpio_same_csr_outstanding 1.190s 19.426us 5 5 100.00
gpio_csr_aliasing 1.300s 35.429us 1 1 100.00
gpio_csr_hw_reset 0.980s 160.285us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 2.130s 1503.797us 25 25 100.00
gpio_sec_cm 1.350s 429.761us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 2.130s 1503.797us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 10 10 100.00
gpio_rand_straps 0.930s 21.467us 10 10 100.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 5.100s 1127.069us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 9 test runs
gpio_stress_all 4049548763665606051778827038834935753554696585082868326056747780155285055543 427
UVM_INFO @ 2237623878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 86193640014434563059634641785585985134550802874163174230836021239222049967403 223
UVM_INFO @ 8930892489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 65147769141366343789664573557349211668664294249928206773425010575225167284303 460
UVM_INFO @ 4906102900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 35944101911542322668456395967602229210779922852954810254076242710967073518199 544
UVM_INFO @ 3616803550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92754187504000024831273464621503025040843419222679710743686951464329096474008 2306
UVM_INFO @ 15683524804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 12401112577644376625311053003460780164930149047476003558117155118197147394670 665
UVM_INFO @ 8446708643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92793757311748827774189851907709875649472205142641749409429651635620824595341 1939
UVM_INFO @ 53801627004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 53132457887645253219936305038816536579683471129294243194923857460932037760599 217
UVM_INFO @ 4224956756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 22453507489515322943120026059089816376357211675460493594566542065332854886427 726
UVM_INFO @ 3268885981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 5 test runs
gpio_stress_all_with_rand_reset 32959276077738910310451067105214834281855191810762322587527963434637047412981 87
UVM_INFO @ 54107004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 28014106054348123309700403784153598075340173075364706686852343969087785480167 86
UVM_INFO @ 23850539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 31270787003791566399720049603614020278517197412331903338850709849016686679523 86
UVM_INFO @ 35068766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 73959187157782878623359720162556879496833590381638125756612262217964142374462 131
UVM_INFO @ 195535059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 1441748515986023618384700126556771524016780680200835469116940673933014051878 118
UVM_INFO @ 437394670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 5 test runs
gpio_stress_all_with_rand_reset 109183330340730717908463462646431920939358976515132619946210267667914651153181 84
UVM_INFO @ 3921192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20991735302843664673524105764244883832055882959812149930996981961256359720190 84
UVM_INFO @ 1713148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 30496828720087949247000357335118600062233761663835282568671786857166914264897 84
UVM_INFO @ 212111807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 10671250255439754497300027056212040590702178190274712473978308277364204551702 84
UVM_INFO @ 433000490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76938207060510532447100434278556570816195739975571404634430706513415824311885 86
UVM_INFO @ 1127068893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---