| V1 |
|
100.00% |
| V2 |
|
87.18% |
| V2S |
|
94.15% |
| V3 |
|
40.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 70.370s | 4888.138us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.280s | 74.945us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| alert_handler_csr_rw | 6.350s | 120.449us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| alert_handler_csr_bit_bash | 325.770s | 12969.884us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| alert_handler_csr_aliasing | 126.170s | 4985.102us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 12.550s | 133.920us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| alert_handler_csr_rw | 6.350s | 120.449us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 126.170s | 4985.102us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 25 | 25 | 100.00 | |||
| alert_handler_esc_alert_accum | 409.130s | 28644.544us | 25 | 25 | 100.00 | |
| esc_timeout | 50 | 50 | 100.00 | |||
| alert_handler_esc_intr_timeout | 92.620s | 4760.131us | 50 | 50 | 100.00 | |
| entropy | 22 | 25 | 88.00 | |||
| alert_handler_entropy | 3600.144s | 0.000us | 22 | 25 | 88.00 | |
| sig_int_fail | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 88.870s | 1345.954us | 50 | 50 | 100.00 | |
| clk_skew | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 70.370s | 4888.138us | 10 | 10 | 100.00 | |
| random_alerts | 10 | 10 | 100.00 | |||
| alert_handler_random_alerts | 100.070s | 2763.272us | 10 | 10 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 90.640s | 1585.370us | 50 | 50 | 100.00 | |
| ping_timeout | 23 | 50 | 46.00 | |||
| alert_handler_ping_timeout | 517.090s | 58819.742us | 23 | 50 | 46.00 | |
| lpg | 86 | 100 | 86.00 | |||
| alert_handler_lpg | 3600.154s | 0.000us | 41 | 50 | 82.00 | |
| alert_handler_lpg_stub_clk | 3600.146s | 0.000us | 45 | 50 | 90.00 | |
| stress_all | 49 | 50 | 98.00 | |||
| alert_handler_stress_all | 5710.210s | 94959.652us | 49 | 50 | 98.00 | |
| alert_handler_entropy_stress_test | 0 | 20 | 0.00 | |||
| alert_handler_entropy_stress | 35.250s | 2355.752us | 0 | 20 | 0.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 6.200s | 252.741us | 20 | 20 | 100.00 | |
| intr_test | 10 | 10 | 100.00 | |||
| alert_handler_intr_test | 3.070s | 21.625us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 29.680s | 1824.732us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 29.680s | 1824.732us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.280s | 74.945us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 6.350s | 120.449us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 126.170s | 4985.102us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 53.740s | 2134.170us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.280s | 74.945us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 6.350s | 120.449us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 126.170s | 4985.102us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 53.740s | 2134.170us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 443.450s | 25665.252us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 443.450s | 25665.252us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 443.450s | 25665.252us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 443.450s | 25665.252us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 1408.090s | 65703.511us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 107.730s | 1262.913us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| alert_handler_tl_intg_err | 107.730s | 1262.913us | 25 | 25 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 443.450s | 25665.252us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 70.370s | 4888.138us | 10 | 10 | 100.00 | |
| sec_cm_alert_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 70.370s | 4888.138us | 10 | 10 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 70.370s | 4888.138us | 10 | 10 | 100.00 | |
| sec_cm_class_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 70.370s | 4888.138us | 10 | 10 | 100.00 | |
| sec_cm_alert_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 88.870s | 1345.954us | 50 | 50 | 100.00 | |
| sec_cm_lpg_intersig_mubi | 41 | 50 | 82.00 | |||
| alert_handler_lpg | 3600.154s | 0.000us | 41 | 50 | 82.00 | |
| sec_cm_esc_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 88.870s | 1345.954us | 50 | 50 | 100.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 22 | 25 | 88.00 | |||
| alert_handler_entropy | 3600.144s | 0.000us | 22 | 25 | 88.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 22 | 25 | 88.00 | |||
| alert_handler_entropy | 3600.144s | 0.000us | 22 | 25 | 88.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 57.320s | 1113.087us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 4 | 10 | 40.00 | |||
| alert_handler_stress_all_with_rand_reset | 464.870s | 18984.251us | 4 | 10 | 40.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (alert_handler_scoreboard.sv:482) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 22 test runs | |||
| alert_handler_ping_timeout | 97453703827600102386051181226889745717328004008422703040097371350196612181014 | 93 |
UVM_INFO @ 815164753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 746140133649159408118246539400312087839568671219042731152233918330601338583 | 93 |
UVM_INFO @ 696333968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 61153696260538263415071187202536851173571467790894978055223794304544431640692 | 118 |
UVM_INFO @ 17156907364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 107541901295545763301976693834932677765549312368849684917393695963087609390609 | 135 |
UVM_INFO @ 7210951781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 33090854333741631481577502057964048143736364381576221528925485341139177905765 | 115 |
UVM_INFO @ 6808320034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 108409166554625402939577755102904546660731389249799099243298363345376140542021 | 114 |
UVM_INFO @ 11000691742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 89937275590710842476198398014765092047965861819098983562272725228847477428965 | 105 |
UVM_INFO @ 19175061194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 72753586255854172244988016327130292490633394187817774880049236715536892201164 | 96 |
UVM_INFO @ 2168847455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 2243650910661767134965947320235931688391581696530742567302992117132287701130 | 93 |
UVM_INFO @ 2394135528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 112182870370941758911491474359313058619518931147655577540644788749336362221832 | 111 |
UVM_INFO @ 10808585521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 102907212254436733739078902087195918924323212550838939921609458739712160679522 | 135 |
UVM_INFO @ 12592242509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 49229313743303551366491846126612691070544369102301477618924195519940789552544 | 117 |
UVM_INFO @ 23173612365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 75978956331914794635588348962831167412436029488586671776284683953939816240985 | 88 |
UVM_INFO @ 20183654920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 70493101743076136485524190946261381043227997726713607375605437747684834463450 | 89 |
UVM_INFO @ 406049973479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 32597073127128839226515238454275898493148609242562050487140728058834033101283 | 90 |
UVM_INFO @ 3038376220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_lpg | 9268702330009759997703969777687607645682690566094267458131692260862113481806 | 92 |
UVM_INFO @ 59689153549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 86368576627936757496857741641277654370142495144613469697458835136784735415141 | 105 |
UVM_INFO @ 3945774822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 109676723001043383028120153328848446646333359398474067293729183210188486351530 | 93 |
UVM_INFO @ 23278033815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 11115926779351063354595022866397645195637003852048123165852427962931188852926 | 93 |
UVM_INFO @ 1454811057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 85725631996922391102225131543551810970379463214211207574398555989828212248065 | 96 |
UVM_INFO @ 7558815569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 103017399719188809289600529939126005296259559274166989570587060581772249430717 | 108 |
UVM_INFO @ 13762380764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 6489875424982708690548220135146855017599311916964370282658547270950594696643 | 99 |
UVM_INFO @ 3780708951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 20 test runs | |||
| alert_handler_entropy_stress | 2901806779515260365369839422857756166501714833135630364281890646127442196199 | 206 |
UVM_INFO @ 859582993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 55267080369887755056033059981408171373075311298128808274502623911762855324040 | 164 |
UVM_INFO @ 221432090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 68442719469092423011025863459919145188120546067875482022453019747498607640575 | 192 |
UVM_INFO @ 2355751633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 35526506072770422810964975775267985231917107376535376433529165758779293632990 | 190 |
UVM_INFO @ 2693321261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 35565989377457121429440773319068580626902451463291323562798850071134403822634 | 170 |
UVM_INFO @ 835858175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 25646773153723909597413009175599601007692042573034664327645161772289097443991 | 186 |
UVM_INFO @ 71032698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 44211933085472126440775492537147023741486388550420634108238089249518796520927 | 210 |
UVM_INFO @ 3268992438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 51713843853466987954352816490732822422106594127110738697180396517063373173049 | 206 |
UVM_INFO @ 249550816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 31124702365790086695430893708434579013767836222344513222761120116025925741960 | 164 |
UVM_INFO @ 66580749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 53521849958864193634818258366937900051968866194555231115400771107071178989561 | 210 |
UVM_INFO @ 144646160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 27037368508691230466752075609147131416657781737465857075252722494390645983005 | 176 |
UVM_INFO @ 2342758195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 8581113812878707832073525765820638482316791690479584174131762459994913306436 | 162 |
UVM_INFO @ 651089363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 30341162822810745690721873370405891551097751185445977549302371429994749757972 | 200 |
UVM_INFO @ 47920897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 37923468972874276300065986136137923048745455079998097829777012344703287742686 | 204 |
UVM_INFO @ 56611512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 33643762772028199114980604636740770124392917052699723967535018516741684976631 | 186 |
UVM_INFO @ 576251270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 10044881352413212066637858298460393870716504345111626478670269639349674847868 | 152 |
UVM_INFO @ 115518609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 73578942693939449322763881866961646014682657518907341605580907125937885756283 | 210 |
UVM_INFO @ 87683245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 47463196587444841144487153683604962718991191683474595409044519059242209737942 | 204 |
UVM_INFO @ 749479110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 78775434257366147704173015117763217461434278381252423368183970292563408577771 | 162 |
UVM_INFO @ 645030735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 61960602400819050477839465612415966055982990060768333504500470807469156800014 | 212 |
UVM_INFO @ 1089120687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | 14 test runs | |||
| alert_handler_entropy | 73683970306658298518339306424337911984956543939669787978962139755867455953865 | None | ||
| alert_handler_lpg | 85486649580276770744738849656728928404583900333295110788472488346343125862773 | None | ||
| alert_handler_lpg_stub_clk | 50163823735321754860301650418340481446105238208418184628785089746868924394882 | None | ||
| alert_handler_entropy | 81184451372675841772122804655725866571608626585542739367210624272810919102271 | None | ||
| alert_handler_entropy | 73458033310482959422050787986267502494552185268596662890044591457606261064157 | None | ||
| alert_handler_lpg | 6588711059734845243148921116368601896997835957676145373651277316958362795933 | None | ||
| alert_handler_lpg | 86909099768770539849522605168964355966602655397265058444831972207413463128868 | None | ||
| alert_handler_lpg | 21088902132875426361604066504993531887725689409322706928162969751308450704643 | None | ||
| alert_handler_lpg_stub_clk | 28153598339127996814922576898571392769882641647793573917913504001501185152931 | None | ||
| alert_handler_lpg_stub_clk | 34357786816416955116609083382519137228558333431855699186250096915277597259339 | None | ||
| alert_handler_lpg | 5204972778868172803529840621807828630357520625400521899597242345374387670543 | None | ||
| alert_handler_lpg_stub_clk | 62405699530999042918168876516126635046454766531779313242390794880726914027754 | None | ||
| alert_handler_lpg | 52739678217348410683910351734026470220986871132586160043569516398343000085162 | None | ||
| alert_handler_lpg_stub_clk | 57556673096206934199338626101347458376517928412976681022137855021324617707025 | None | ||
| UVM_ERROR (alert_handler_scoreboard.sv:604) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. | 8 test runs | |||
| alert_handler_ping_timeout | 80866664570149903191743183152694282170661302671409367940784330050232672913074 | 86 |
UVM_INFO @ 587311332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 63290521861381792568273628684807984193379124281790223959218484136251630602482 | 86 |
UVM_INFO @ 148168443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 65857164448297626370378407976363686811048250495925716826200873032908759689167 | 86 |
UVM_INFO @ 362264890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 75178143964509699319650150358197507773919532657064005256592680784904999074774 | 86 |
UVM_INFO @ 1851591169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 58880003337093564666766431757215279848947714965431365251560675836016018543388 | 86 |
UVM_INFO @ 38883095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 19790709722678283292119887209957493032686098472681109025892006336061389783384 | 86 |
UVM_INFO @ 1218466950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 106423122516210745573760050185880946090892582465791824030246944447801237917294 | 86 |
UVM_INFO @ 459524038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 90041487546028069063763511113328541119487704975411761915468281600671044056973 | 86 |
UVM_INFO @ 1366148711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1296) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 6 test runs | |||
| alert_handler_stress_all_with_rand_reset | 109559416758438099136824931445993403972084068775564199125140048423270069700599 | 193 |
UVM_INFO @ 6728514528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 56285204955160668308316615920454964121607587873718050613163154969534674547127 | 104 |
UVM_INFO @ 3767251574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 60114875544162162268193162682852030261821366463443112430803220910833661727965 | 98 |
UVM_INFO @ 343255367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 82505649619975786515026600049723010660560816391903060254119231839941556185452 | 91 |
UVM_INFO @ 1264874481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 67798983697989567631610897670219515770273400986181781643256582283127278811330 | 89 |
UVM_INFO @ 109781492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 14946627938713263057394201404258309379764527907124067403441079716813576746615 | 89 |
UVM_INFO @ 1141049508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) | 1 test run | |||
| alert_handler_stress_all | 6477315311456443528578611702876394284436021329065329820405968508901891626542 | 153 |
UVM_INFO @ 233847053038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|