Simulation Results: gpio

 
29/08/2026 03:59:48 DVSim: v1.49.0 sha: 0098135 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.67 %
  • code
  • 94.91 %
  • assert
  • 98.10 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 80.52 %
Validation stages
V1
100.00%
V2
95.54%
V2S
100.00%
V3
40.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.670s 141.291us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.690s 153.959us 10 10 100.00
gpio_smoke_en_cdc_prim 1.590s 297.709us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.020s 465.430us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.750s 21.295us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.840s 13.612us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.360s 85.170us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.840s 18.541us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.090s 54.361us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.840s 13.612us 5 5 100.00
gpio_csr_aliasing 0.840s 18.541us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.600s 175.119us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.380s 42.941us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.350s 219.758us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.550s 476.045us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.400s 892.006us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 2.710s 187.462us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 25.750s 1946.340us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.620s 1128.495us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.290s 145.059us 10 10 100.00
stress_all 3 10 30.00
gpio_stress_all 77.730s 22155.234us 3 10 30.00
alert_test 10 10 100.00
gpio_alert_test 0.910s 27.460us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.900s 34.502us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.770s 212.828us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.770s 212.828us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.840s 13.612us 5 5 100.00
gpio_same_csr_outstanding 1.160s 428.904us 5 5 100.00
gpio_csr_aliasing 0.840s 18.541us 1 1 100.00
gpio_csr_hw_reset 0.750s 21.295us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.840s 13.612us 5 5 100.00
gpio_same_csr_outstanding 1.160s 428.904us 5 5 100.00
gpio_csr_aliasing 0.840s 18.541us 1 1 100.00
gpio_csr_hw_reset 0.750s 21.295us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.820s 2328.407us 25 25 100.00
gpio_sec_cm 1.260s 404.540us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.820s 2328.407us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 8 10 80.00
gpio_rand_straps 0.920s 47.392us 8 10 80.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 11.880s 3581.605us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 9 test runs
gpio_stress_all 64538693779436613871217594434614793991660263022329167204439972529404275556143 867
UVM_INFO @ 6699922988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 63107497122250906600010395856238708661493223891676681748034100556066426625856 442
UVM_INFO @ 744009371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 48199762323163278928553508194701405885041651600035585994071170542312563573992 655
UVM_INFO @ 7308923436 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 58218334777646761289663428686223656448864376451560606072801433925605710978816 84
UVM_INFO @ 95227909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 76802094787106933876019244298070479438421194245660800212554117999408421969178 81
UVM_INFO @ 1105408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 77352638316469981359840713406740082952451218305543168909825108965888605389619 231
UVM_INFO @ 2933460718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 92063396584801188317809216845692753447535814700363177105303799944780593066804 84
UVM_INFO @ 385607613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 86429363607263367094942768851260107988441514415697109079098515630008457967229 221
UVM_INFO @ 823429150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 55339509768361243770168042172763137125090970548329660072549814281995856236131 81
UVM_INFO @ 1304437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 6 test runs
gpio_stress_all_with_rand_reset 86621251415486742755762967907195115172514312066172056914158296674590519591685 85
UVM_INFO @ 179432466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44249624136631453447984567049011763871299229777519517478896242618094252707520 84
UVM_INFO @ 3479422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77878664996622827440202320895636517498326691289569435304781929258502275957677 175
UVM_INFO @ 2524411159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 81818085387615767108929528850747160914402467129751752564395349891566146823211 86
UVM_INFO @ 309098789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27779678220553089113534493873820131435111775642204311030918207920050699048493 85
UVM_INFO @ 240652187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23725531490412613587148139810392579886197076018708360884931556691182017883915 84
UVM_INFO @ 6917036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 4 test runs
gpio_stress_all_with_rand_reset 105990204124890612015013264305698166657659833648005823331843039164849537227054 86
UVM_INFO @ 5828891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 55169578111367042264853428007684091972004975050081272557151985730651035687587 86
UVM_INFO @ 2790909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22700318631133025767285442429581384968886140308775908075303162385646974388045 161
UVM_INFO @ 1039643267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18520449529274179055263772866308062972989012933735812959479581459055114664156 145
UVM_INFO @ 3581604836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---