| V1 |
|
100.00% |
| V2 |
|
97.25% |
| V2S |
|
89.29% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 2.000s | 84.577us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 3.000s | 74.986us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 80.775us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 3.000s | 268.355us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 5.000s | 161.753us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 2.000s | 87.162us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 3.000s | 130.676us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 3.000s | 268.355us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 87.162us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 3.000s | 74.986us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 82.104us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 3.000s | 74.986us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 82.104us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| aes_b2b | 10.000s | 734.078us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| multi_message | 94 | 95 | 98.95 | |||
| aes_smoke | 3.000s | 74.986us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 82.104us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| aes_alert_reset | 5.000s | 98.467us | 24 | 25 | 96.00 | |
| failure_test | 84 | 85 | 98.82 | |||
| aes_man_cfg_err | 3.000s | 64.515us | 10 | 10 | 100.00 | |
| aes_config_error | 4.000s | 82.104us | 50 | 50 | 100.00 | |
| aes_alert_reset | 5.000s | 98.467us | 24 | 25 | 96.00 | |
| trigger_clear_test | 9 | 10 | 90.00 | |||
| aes_clear | 4.000s | 147.276us | 9 | 10 | 90.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 5.000s | 128.417us | 1 | 1 | 100.00 | |
| reset_recovery | 24 | 25 | 96.00 | |||
| aes_alert_reset | 5.000s | 98.467us | 24 | 25 | 96.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| aes_sideload | 4.000s | 103.876us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 4.000s | 166.318us | 10 | 10 | 100.00 | |
| stress_all | 6 | 10 | 60.00 | |||
| aes_stress_all | 15.000s | 12029.852us | 6 | 10 | 60.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 2.000s | 62.052us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 8.000s | 2663.319us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 8.000s | 2663.319us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 80.775us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 268.355us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 87.162us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 282.156us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 80.775us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 268.355us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 87.162us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 282.156us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 8 | 10 | 80.00 | |||
| aes_reseed | 15.000s | 1106.406us | 8 | 10 | 80.00 | |
| fault_inject | 571 | 660 | 86.52 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| shadow_reg_update_error | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| shadow_reg_read_clear_staged_value | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| shadow_reg_storage_error | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| shadowed_reset_glitch | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 4.000s | 197.268us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 19.000s | 5687.147us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 4.000s | 326.881us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 4.000s | 326.881us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 24 | 25 | 96.00 | |||
| aes_alert_reset | 5.000s | 98.467us | 24 | 25 | 96.00 | |
| sec_cm_main_config_shadow | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| sec_cm_gcm_config_shadow | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| sec_cm_main_config_sparse | 133 | 145 | 91.72 | |||
| aes_smoke | 3.000s | 74.986us | 10 | 10 | 100.00 | |
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| aes_alert_reset | 5.000s | 98.467us | 24 | 25 | 96.00 | |
| aes_core_fi | 125.000s | 10016.323us | 89 | 100 | 89.00 | |
| sec_cm_gcm_config_sparse | 149 | 160 | 93.12 | |||
| aes_config_error | 4.000s | 82.104us | 50 | 50 | 100.00 | |
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| aes_core_fi | 125.000s | 10016.323us | 89 | 100 | 89.00 | |
| sec_cm_aux_config_shadow | 18 | 20 | 90.00 | |||
| aes_shadow_reg_errors | 3.000s | 145.037us | 18 | 20 | 90.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 3.000s | 88.422us | 10 | 10 | 100.00 | |
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| aes_sideload | 4.000s | 103.876us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 88.422us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 88.422us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 88.422us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 88.422us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 88.422us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 5.000s | 179.448us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| sec_cm_main_fsm_redun | 596 | 685 | 87.01 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| aes_ctr_fi | 3.000s | 55.718us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| sec_cm_cipher_fsm_redun | 571 | 660 | 86.52 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| sec_cm_cipher_ctr_redun | 310 | 350 | 88.57 | |||
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| sec_cm_ctr_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| sec_cm_ctr_fsm_redun | 286 | 335 | 85.37 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_ctr_fi | 3.000s | 55.718us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 1 | 10 | 10.00 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| sec_cm_ctrl_sparse | 596 | 685 | 87.01 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| aes_ctr_fi | 3.000s | 55.718us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_global_esc | 24 | 25 | 96.00 | |||
| aes_alert_reset | 5.000s | 98.467us | 24 | 25 | 96.00 | |
| sec_cm_main_fsm_local_esc | 596 | 685 | 87.01 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| aes_ctr_fi | 3.000s | 55.718us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 596 | 685 | 87.01 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| aes_ctr_fi | 3.000s | 55.718us | 25 | 25 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 286 | 335 | 85.37 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_ctr_fi | 3.000s | 55.718us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 1 | 10 | 10.00 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| sec_cm_data_reg_local_esc | 571 | 660 | 86.52 | |||
| aes_fi | 5.000s | 338.448us | 1 | 10 | 10.00 | |
| aes_control_fi | 61.000s | 0.000us | 260 | 300 | 86.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 310 | 350 | 88.57 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 23.000s | 2126.072us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | 29 test runs | |||
| aes_control_fi | 9620561158964495066328581820006691771018159174221176742196276166700655977502 | None | ||
| aes_cipher_fi | 48217535215245835976323657303440405972978874147045046599263962519916037769896 | None | ||
| aes_control_fi | 63554026218128741069792137574528134826194323139261666539680801878903253287450 | None | ||
| aes_control_fi | 133556114581140005586543855839421383426323400892297745793224275807687612385 | None | ||
| aes_cipher_fi | 58181836712502483967358059871318575975695175389733773339870324542093495841529 | None | ||
| aes_control_fi | 91376529198788612125185774044091072926361801597875435066393519916266396787115 | None | ||
| aes_control_fi | 106957576034161778490364585010948232056736051685960954499767968985984727438061 | None | ||
| aes_control_fi | 24090317749191804377340534064808147736041446447298586398920765208548982932872 | None | ||
| aes_control_fi | 81932172981967703243408514211710180902633396239479202973382046527813700766091 | None | ||
| aes_cipher_fi | 92809255790436981063838522066122782567225907078424466528392559888646541022342 | None | ||
| aes_cipher_fi | 50741931181506616326437162634853270558621862671093086773754234411910125562927 | None | ||
| aes_control_fi | 110198728412563200322037488132618165177196900292470172440150240984325167054178 | None | ||
| aes_cipher_fi | 58203923045131840141219653381859970410409935714896602363718925592554087196 | None | ||
| aes_control_fi | 28482511466487818300584198051924330812220474247017185328081787356848768235975 | None | ||
| aes_control_fi | 40312715447748618560985745328613897398097342090426105695851226147647891806080 | None | ||
| aes_control_fi | 73121005070962471769209084975144300956414982188378055152873448872957075483322 | None | ||
| aes_cipher_fi | 88975106262113055338452159243901395084844637426939564971501559934321769277205 | None | ||
| aes_control_fi | 82875249356539187559729748159077124370969630800948803168601355745385700425607 | None | ||
| aes_cipher_fi | 94369484036560603105040650914170559400910029089062760958979236225034373246395 | None | ||
| aes_cipher_fi | 90929085032471933796575123040205326479061872664149557255197368475758210114900 | None | ||
| aes_cipher_fi | 17934710215934217938378094890641054224355617069183998899906992229897331867469 | None | ||
| aes_cipher_fi | 114361491943601206338333858648082561439489354903967778905481601506874376467677 | None | ||
| aes_cipher_fi | 102885937661406559351845695161535085558063849073166661837774201990553632881318 | None | ||
| aes_control_fi | 50073263070751334301577858345316104050399366058375586082940796104216852779157 | None | ||
| aes_control_fi | 12841433255992749469811192623296298614065186579326979171745432414106543076551 | None | ||
| aes_control_fi | 92288500132770914869873726484017791872222884105381675613048800569966455157730 | None | ||
| aes_control_fi | 10555283307327652673444110652227123637373753334272364674568630787078241770651 | None | ||
| aes_cipher_fi | 63350331103719375634177428929352244971525022893423577487472403933449351633570 | None | ||
| aes_cipher_fi | 86467131458649811425647645989579196501507167589573985006068175493694492867843 | None | ||
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 26 test runs | |||
| aes_cipher_fi | 94715887362425626582994562353871622872619586223074711361972612750057999848278 | 147 |
UVM_INFO @ 10012389433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 62112805251391982617825360420014671265027728601515031408330205760385441837927 | 142 |
UVM_INFO @ 10002955218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 35986611204250053747360900023238885341161183240002652989102944252820236752030 | 146 |
UVM_INFO @ 10015295887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 41855266250043419382247218363190385274027848942095239358856148168709084641396 | 145 |
UVM_INFO @ 10010751821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 36363297001610618756631562228197939513172110202315169557845761797016869031188 | 141 |
UVM_INFO @ 10010918609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 90340037465231830102384275118490751809827399568048051512121384861115453968989 | 148 |
UVM_INFO @ 10003538356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 41661156908021008481755514559420682300095823501490530269534604604831458219343 | 143 |
UVM_INFO @ 10011637093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 54316098819972630893554535032656683077309431132839693406339963300835384781162 | 145 |
UVM_INFO @ 10009338383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 70260388891013367734075947875175973475326611374800063003036313361750955751107 | 151 |
UVM_INFO @ 10020260592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 9929098165564507226567063589256658909429081019278160626434652860669867828785 | 147 |
UVM_INFO @ 10008116092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 41924360048113716256885065561426118888579596131233423427404752594037462877936 | 139 |
UVM_INFO @ 10004858127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 99391843424638511522538142967675812524099053293690410985731434955898746242067 | 149 |
UVM_INFO @ 10026142351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 60453583615651191222174174228809995754520151396901653020670491948380118593471 | 143 |
UVM_INFO @ 10006991125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 43165219546083969336431534095059942195195125195042976686259648284873775860684 | 143 |
UVM_INFO @ 10005112658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 69077201403946329037342277905146493007577414227770445673624189028527135169156 | 140 |
UVM_INFO @ 10010400474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 48715648973944263646581834582451419242809008893299770849907923371537770200799 | 145 |
UVM_INFO @ 10015743613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 56284530847682237869844417576678800857019120335500519325418570248177254714753 | 147 |
UVM_INFO @ 10015279460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 85345181158242128705209692787044143861856957865938479166582785163510569290722 | 143 |
UVM_INFO @ 10007106414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 88864740284634385868716535566151025391795360063592391583160629613208573530970 | 144 |
UVM_INFO @ 10024115403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 99627698097420722263424901976212691784792325565865298062324568763892116354941 | 149 |
UVM_INFO @ 10023930946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 17298183493921140592768097956611724185532114968193323843222487304106269840046 | 144 |
UVM_INFO @ 10003490597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 33695149134720482019112234663196046990224483862004592140423616620036747975374 | 147 |
UVM_INFO @ 10033396886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 50276776288720594064093689869295761885745836590854656179169296248308596652142 | 146 |
UVM_INFO @ 10004787696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 96523256646290327483898135295834071459258026531233266050698255126194161755434 | 153 |
UVM_INFO @ 10021747890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 58757523192804033403867490407057955245279010726352364126930383526461978348326 | 154 |
UVM_INFO @ 10008947004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 52291622471291605143678491668929614809555714506748160556585767617045568472459 | 141 |
UVM_INFO @ 10013897266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 23 test runs | |||
| aes_control_fi | 47994150835227580297077574106161959215627897952026020120073520487834608202725 | 137 |
UVM_INFO @ 10009171389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 50289049758909762306583557267121121893023276829586222280976979536312145081912 | 143 |
UVM_INFO @ 10008547502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 107987438384815989702914250590145070459565829690658744096475006237577144950255 | 141 |
UVM_INFO @ 10010988227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 63259151730364935516187075879830427616383431724172084073338886438298687415205 | 144 |
UVM_INFO @ 10017744342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 22321797465659980070324999255317066611451102277268212502313265779465092465698 | 152 |
UVM_INFO @ 10004545080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 94736053290912882401842364371146489462429380413947008274654724888979235441004 | 141 |
UVM_INFO @ 10002919051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 7200173423402096946831961683435708685214615396719583619253441329847835086172 | 145 |
UVM_INFO @ 10028369296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 54543923954201250289258597300758849427790840804395584742320557962345170782837 | 142 |
UVM_INFO @ 10013374437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 46214889352468387022902889361876409009203094641418438114940492339591173403138 | 145 |
UVM_INFO @ 10011555330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 53817431217915469763628075988890649193984679624743824015997429216722883008921 | 149 |
UVM_INFO @ 10010443839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 41933225604688482289159831637465998005484966078082331972989363262523108377208 | 153 |
UVM_INFO @ 10023632307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 43320219509955867063599461624315583706968672250640413758884156642258909599077 | 150 |
UVM_INFO @ 10012888951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 50148189445263632958722907907081554701604821713853324444952204649542986379127 | 142 |
UVM_INFO @ 10007562347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 68027394926722398714391637730151375147495327300561016212676378480520637557603 | 142 |
UVM_INFO @ 10004071126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 44973792323594119184088313203207443938781737620554992864839248919218145881822 | 146 |
UVM_INFO @ 10003840890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 17916491757833923266739160665373737371278255183681707687788203533836526838235 | 139 |
UVM_INFO @ 10003530801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 70910722641834277250984987361496437214899174988289391416558493436253607758670 | 146 |
UVM_INFO @ 10005392387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 65477807340416802687641896476616481756016153963504492141952163174302285670725 | 153 |
UVM_INFO @ 10023824091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 26962469152518376943539473610697012682906540871226777032590006094310873725013 | 142 |
UVM_INFO @ 10004257134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 83538503593809447387755950267999247102993055036176416272984857183097720672835 | 140 |
UVM_INFO @ 10002828907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 27716549076116925651988683584110846942764091737708284388940622795565291153706 | 149 |
UVM_INFO @ 10003817198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 98872782436627956035517966205578131226526985558718509175388670683334684161269 | 140 |
UVM_INFO @ 10025808623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 32317534324173981381294957795439359393183505496087394991253881105581443135171 | 145 |
UVM_INFO @ 10011807176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 10 test runs | |||
| aes_core_fi | 105168038074743210592095704012203959362699454928041421306085249596825489841259 | 140 |
UVM_INFO @ 10013172221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 27807147474649929989623771546484157097672126319964418803685420126584222842448 | 138 |
UVM_INFO @ 10054091809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 96802658864409816739116035510204769146065556627067058256579623250378599291611 | 153 |
UVM_INFO @ 10008348597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 111099700324178191356686881916026726400147196202398932789430331118627740830281 | 154 |
UVM_INFO @ 10027762897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 102298242294662670960669008480450275587890966977668499177339936822300912500683 | 150 |
UVM_INFO @ 10007988329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 98755300928531731793749061103419228622598329971300603149310686924046659604725 | 137 |
UVM_INFO @ 10012550227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 64013248463712220370549582178846717400906215144722988746897626566592412585951 | 149 |
UVM_INFO @ 10015366399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 79406141964642559541691146150911849963031181354324245048533278283811351354601 | 150 |
UVM_INFO @ 10016395980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 88925880169541424571670448471923973539757440656227151315470703111132936022161 | 138 |
UVM_INFO @ 10011504003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 35899574426992167389872818700060373060376105494156586739536408268568618945161 | 143 |
UVM_INFO @ 10013180808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] | 9 test runs | |||
| aes_fi | 12343193280098351089640895749849479685464321666168147764699656808267833147260 | 3176 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 23490966270321319573602200128215519312794511308729853235564059513024056283488 | 2699 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
|
|
| aes_fi | 78842111365629501622033980985898093893602303080677011611984502939401373431512 | 6663 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 66404768571868625593317603495758472307208634536927097583914339194030495973085 | 7798 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 113919833440144621540876259425423101364114590027000298289439993615205308158554 | 7725 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 19389489198128045229767290647949377245124220537713066764641079371609621406510 | 3438 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 104004590879655246815819141248962806643252482761845906125332201385533081352155 | 4772 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
|
|
| aes_fi | 40126555844022239909305498577382446551681421758317993483430861887294316760532 | 2949 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 1139852390697501633114723492310973941490507724858797510366214891948284668825 | 5124 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 9 test runs | |||
| aes_stress_all | 789656413871722154812296208663098462231289822562320252469632114362724179961 | 7295 |
UVM_INFO @ 40447126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 26850060241887220228229409923420736784140799439978780737939526967636667359995 | 584 |
UVM_INFO @ 738527087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 111844578918426114493732609511209062763721101357289563225038048226353979698993 | 4028 |
UVM_INFO @ 28607565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 42321664788014821286367359883226969412589493500602641014169786343177570876948 | 539 |
UVM_INFO @ 1424970915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 76843224187150566627580641365023117412386497278378199258718666714561293158950 | 4422 |
UVM_INFO @ 59831997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 103820599432646976094536895519980323621194219041075565345657140969945896203369 | 7439 |
UVM_INFO @ 910604080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 48359278772924504581173396432139497058594995351173580260687058937221474667315 | 169 |
UVM_INFO @ 84128975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 105236064221182860891668339776965426200896780670785726699719960134157060035153 | 35111 |
UVM_INFO @ 491358203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 94879136133170907467953874251788731116838884673819001681675393391485983341715 | 1016 |
UVM_INFO @ 344844392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) | 4 test runs | |||
| aes_stress_all_with_rand_reset | 45608688590217327745501301963004546977514826651620751517634276799161602110105 | 458 |
UVM_INFO @ 1633437438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 83193167005906274227366005042338172699923657304605015222529648992569342778357 | 189 |
UVM_INFO @ 203178711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 20907828172751645672299812479631004526253003836178688098928837366344093968972 | 518 |
UVM_INFO @ 2126072079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 50814507341013149298754500784545508569842892848171952311722284253644403284887 | 697 |
UVM_INFO @ 694386765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:463) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: aes_reg_block_extended.ctrl_shadowed reset value: * | 2 test runs | |||
| aes_shadow_reg_errors | 24928104065464550792020756335055329684507660364363912561530990051842450369777 | 107 |
UVM_INFO @ 90239629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_shadow_reg_errors | 37572020559589760653343128676245139437474547664061225101568636472714984242338 | 107 |
UVM_INFO @ 145037098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:256) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error | 2 test runs | |||
| aes_stress_all | 75035906625960522213016223871361644469223379454299451261212561916709097105539 | 34238 |
UVM_INFO @ 12029852255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_alert_reset | 30234649052556191688278822297249396820618935098395287890078826172048289913841 | 2114 |
UVM_INFO @ 54222927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 2 test runs | |||
| aes_control_fi | 109624523539347490957845618422466250948657048322522799828301361550133164027532 | 144 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 24696756150640242712860225815075845033938198567098743196951415249735008424262 | 148 |
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:97) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 98609731751585986324642989613787099759952064425563294500919658089698767609889 | 109 |
UVM_INFO @ 22886590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:782) scoreboard [scoreboard] # * | 1 test run | |||
| aes_clear | 95976317681262042824446053147471280641468378754038577643356380088392959134967 | 4660 |
TEST FAILED MESSAGES DID NOT MATCH
0 ee 20 fb 0
1 00 1d 8d 0
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 82192725094063762755760954098658364203174583964139679825219433764560513004681 | 109 |
UVM_INFO @ 2336413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) | 1 test run | |||
| aes_core_fi | 111467434693817472007925427758820319182625319728359590754580253509385824400708 | 142 |
UVM_INFO @ 10016322910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|