Simulation Results: gpio

 
05/09/2026 08:56:33 DVSim: v1.49.0 sha: 1e1dace json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.78 %
  • code
  • 94.91 %
  • assert
  • 98.42 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 80.52 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
40.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.820s 363.666us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.570s 96.886us 10 10 100.00
gpio_smoke_en_cdc_prim 1.870s 57.443us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.830s 95.734us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.900s 93.517us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.880s 46.969us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.590s 278.561us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.880s 18.116us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.170s 42.153us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.880s 46.969us 5 5 100.00
gpio_csr_aliasing 0.880s 18.116us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.640s 171.417us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.830s 370.961us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.250s 384.520us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.820s 1231.070us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 4.010s 849.041us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.960s 204.629us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 22.690s 3789.227us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 4.880s 1941.283us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.230s 93.449us 10 10 100.00
stress_all 0 10 0.00
gpio_stress_all 84.730s 15185.794us 0 10 0.00
alert_test 10 10 100.00
gpio_alert_test 0.890s 41.671us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.900s 22.115us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 2.820s 1228.106us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 2.820s 1228.106us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.880s 46.969us 5 5 100.00
gpio_same_csr_outstanding 1.250s 144.294us 5 5 100.00
gpio_csr_aliasing 0.880s 18.116us 1 1 100.00
gpio_csr_hw_reset 0.900s 93.517us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.880s 46.969us 5 5 100.00
gpio_same_csr_outstanding 1.250s 144.294us 5 5 100.00
gpio_csr_aliasing 0.880s 18.116us 1 1 100.00
gpio_csr_hw_reset 0.900s 93.517us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.740s 136.640us 25 25 100.00
gpio_sec_cm 1.220s 140.417us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.740s 136.640us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 8 10 80.00
gpio_rand_straps 0.890s 36.331us 8 10 80.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 6.680s 491.703us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:211) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 12 test runs
gpio_stress_all 107051752790456385668852148016902032723042394747667812266707985614123486761182 394
UVM_INFO @ 1439766289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 82842217843873734775476584383094268637641165135948701780518472979447660943387 82
UVM_INFO @ 89281275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 20519715803916997861656540550939714225236415408617922690381378091854168201380 134
UVM_INFO @ 1921351094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 40632971156488216421206264280042186696058070625891139872116993239225225664263 81
UVM_INFO @ 181781032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 33978120413578357808807732418029011472562305794981220466224198549944621535932 82
UVM_INFO @ 742518069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 62674455968700493293872820394062384549550124138439378976899063858669357967727 81
UVM_INFO @ 986191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 15241361130935220170263951459307967757289811662353265533400869929063100787989 343
UVM_INFO @ 10546895704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 89848125482078100285423830786987524927051421857804791224587599357346805792251 1707
UVM_INFO @ 15185794296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 43552498414134641680047400906921664990967078660730276739877117083088607788414 81
UVM_INFO @ 5452519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 54621566063297718260477577749863258095541222173967781311221927690759519032273 2118
UVM_INFO @ 7444220346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 114141499399522941888054671372553810825197544893618974730591803179279621032762 1104
UVM_INFO @ 5867280685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 34444482391251149381518633544015127975577180713408590218737968297122076387809 969
UVM_INFO @ 3504881427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 5 test runs
gpio_stress_all_with_rand_reset 73696265801743557147189385772020482641474885840679618104705823762440623140182 87
UVM_INFO @ 221122024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7276285553309715208332547875828865002955747624438257972180117864677457357107 86
UVM_INFO @ 21843820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16897019888919170180139737945938482578833993774456014140057627122496068229214 91
UVM_INFO @ 11935619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48836477635265565932636294912451319327608149053233647955997530915691833840352 88
UVM_INFO @ 12886597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62269824176591141572383686993682467877609123373896584009637777765246037758136 347
UVM_INFO @ 491703251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 5 test runs
gpio_stress_all_with_rand_reset 59634333658255292402976049441276489226297416491248225409626775609885331710743 85
UVM_INFO @ 4145288840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68230199433929290898777347658401630762954961655430805449791931073754918344160 86
UVM_INFO @ 181269617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25103791798971546235265279481883023963970440189331775857730349530193012782985 84
UVM_INFO @ 7984981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 13856608822005462946360893063556660432193764598807000144392917710392764821303 86
UVM_INFO @ 24338613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23812030264602094610004633003554651583123138813314992212402400199498202575570 84
UVM_INFO @ 142323677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---