Simulation Results: pwrmgr

 
05/09/2026 08:56:33 DVSim: v1.49.0 sha: 1e1dace json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.48 %
  • code
  • 97.48 %
  • assert
  • 98.96 %
  • func
  • 99.01 %
  • line
  • 99.09 %
  • branch
  • 96.38 %
  • cond
  • 96.32 %
  • toggle
  • 99.62 %
  • FSM
  • 96.00 %
Validation stages
V1
91.30%
V2
91.97%
V2S
72.17%
V3
35.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 10 10 100.00
pwrmgr_smoke 0.960s 27.610us 10 10 100.00
csr_hw_reset 0 1 0.00
pwrmgr_csr_hw_reset 3600.044s 0.000us 0 1 0.00
csr_rw 5 5 100.00
pwrmgr_csr_rw 0.930s 37.697us 5 5 100.00
csr_bit_bash 1 1 100.00
pwrmgr_csr_bit_bash 2.480s 199.459us 1 1 100.00
csr_aliasing 1 1 100.00
pwrmgr_csr_aliasing 0.980s 20.655us 1 1 100.00
csr_mem_rw_with_rand_reset 4 5 80.00
pwrmgr_csr_mem_rw_with_rand_reset 3600.050s 0.000us 4 5 80.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
pwrmgr_csr_rw 0.930s 37.697us 5 5 100.00
pwrmgr_csr_aliasing 0.980s 20.655us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
wakeup 10 10 100.00
pwrmgr_wakeup 1.680s 257.676us 10 10 100.00
control_clks 10 10 100.00
pwrmgr_wakeup 1.680s 257.676us 10 10 100.00
aborted_low_power 20 20 100.00
pwrmgr_aborted_low_power 1.200s 153.074us 10 10 100.00
pwrmgr_lowpower_invalid 1.040s 44.751us 10 10 100.00
reset 15 20 75.00
pwrmgr_reset 2.500s 1000.000us 8 10 80.00
pwrmgr_reset_invalid 1.160s 130.556us 7 10 70.00
main_power_glitch_reset 8 10 80.00
pwrmgr_reset 2.500s 1000.000us 8 10 80.00
reset_wakeup_race 10 10 100.00
pwrmgr_wakeup_reset 1.900s 296.974us 10 10 100.00
lowpower_wakeup_race 10 10 100.00
pwrmgr_lowpower_wakeup_race 1.750s 264.217us 10 10 100.00
disable_rom_integrity_check 10 10 100.00
pwrmgr_disable_rom_integrity_check 1.750s 161.659us 10 10 100.00
stress_all 5 10 50.00
pwrmgr_stress_all 10800.051s 0.000us 5 10 50.00
intr_test 10 10 100.00
pwrmgr_intr_test 0.970s 21.283us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
pwrmgr_tl_errors 3.030s 139.333us 25 25 100.00
tl_d_illegal_access 25 25 100.00
pwrmgr_tl_errors 3.030s 139.333us 25 25 100.00
tl_d_outstanding_access 11 12 91.67
pwrmgr_csr_hw_reset 3600.044s 0.000us 0 1 0.00
pwrmgr_csr_rw 0.930s 37.697us 5 5 100.00
pwrmgr_csr_aliasing 0.980s 20.655us 1 1 100.00
pwrmgr_same_csr_outstanding 1.190s 131.296us 5 5 100.00
tl_d_partial_access 11 12 91.67
pwrmgr_csr_hw_reset 3600.044s 0.000us 0 1 0.00
pwrmgr_csr_rw 0.930s 37.697us 5 5 100.00
pwrmgr_csr_aliasing 0.980s 20.655us 1 1 100.00
pwrmgr_same_csr_outstanding 1.190s 131.296us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 5 30 16.67
pwrmgr_tl_intg_err 3600.046s 0.000us 4 25 16.00
pwrmgr_sec_cm 3600.048s 0.000us 1 5 20.00
prim_count_check 1 5 20.00
pwrmgr_sec_cm 3600.048s 0.000us 1 5 20.00
prim_fsm_check 1 5 20.00
pwrmgr_sec_cm 3600.048s 0.000us 1 5 20.00
sec_cm_bus_integrity 4 25 16.00
pwrmgr_tl_intg_err 3600.046s 0.000us 4 25 16.00
sec_cm_lc_ctrl_intersig_mubi 10 10 100.00
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 3.700s 856.207us 10 10 100.00
sec_cm_rom_ctrl_intersig_mubi 20 20 100.00
pwrmgr_wakeup_reset 1.900s 296.974us 10 10 100.00
pwrmgr_repeat_wakeup_reset 3.530s 775.967us 10 10 100.00
sec_cm_rstmgr_intersig_mubi 10 10 100.00
pwrmgr_sec_cm_rstmgr_intersig_mubi 1.270s 51.090us 10 10 100.00
sec_cm_esc_rx_clk_bkgn_chk 10 10 100.00
pwrmgr_esc_clk_rst_malfunc 0.940s 30.101us 10 10 100.00
sec_cm_esc_rx_clk_local_esc 1 5 20.00
pwrmgr_sec_cm 3600.048s 0.000us 1 5 20.00
sec_cm_fsm_sparse 1 5 20.00
pwrmgr_sec_cm 3600.048s 0.000us 1 5 20.00
sec_cm_fsm_terminal 1 5 20.00
pwrmgr_sec_cm 3600.048s 0.000us 1 5 20.00
sec_cm_ctrl_flow_global_esc 10 10 100.00
pwrmgr_global_esc 0.950s 46.659us 10 10 100.00
sec_cm_main_pd_rst_local_esc 3 10 30.00
pwrmgr_glitch 3600.044s 0.000us 3 10 30.00
sec_cm_ctrl_config_regwen 10 10 100.00
pwrmgr_sec_cm_ctrl_config_regwen 1.660s 284.031us 10 10 100.00
sec_cm_wakeup_config_regwen 5 5 100.00
pwrmgr_csr_rw 0.930s 37.697us 5 5 100.00
sec_cm_reset_config_regwen 5 5 100.00
pwrmgr_csr_rw 0.930s 37.697us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
escalation_timeout 7 10 70.00
pwrmgr_escalation_timeout 1.230s 375.078us 7 10 70.00
stress_all_with_rand_reset 0 10 0.00
pwrmgr_stress_all_with_rand_reset 3600.048s 0.000us 0 10 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 46 test runs
pwrmgr_tl_intg_err 5932987173941857387991945186306262708820679839249717141690013820032795977287 None
pwrmgr_sec_cm 107806137297366808220433214912405416230635050363502315546999512933782602832122 None
pwrmgr_stress_all_with_rand_reset 50156009277607977796246637208443990484546182819375803880582562804266480198664 None
pwrmgr_csr_hw_reset 47434917240405566660939522950364083912087621083552030480035671139864406873661 None
pwrmgr_glitch 43841579827400504929370797967177874194254835202166884975606574484417933765801 None
pwrmgr_sec_cm 40053267184479865006899436870397961829813696199173374595391310309788831641055 None
pwrmgr_stress_all_with_rand_reset 61661226659179403068912739138443020107859479615814693374562082507949672753987 None
pwrmgr_glitch 24377442634789106476817123134627676242959806890254736425100468059527995756495 None
pwrmgr_tl_intg_err 45616427019025384078075863393752479098166266453879822609100210088684685771795 None
pwrmgr_sec_cm 90647731462599349649034119002230296015218448609280775620573793626408450903468 None
pwrmgr_stress_all_with_rand_reset 35754837203561578303846327957278371676321518723192474895152217374650139015671 None
pwrmgr_stress_all 104166138987530788523344704104056688060964587565185187678285971980731194386139 None
pwrmgr_glitch 34014674489528285648509741872231484229457731388401396324936423493067013065200 None
pwrmgr_tl_intg_err 75606146313514133614965108230250656324906388922188953813356732569858184298150 None
pwrmgr_stress_all_with_rand_reset 6223809697650058455583210045164536516778459470832671955378985435770049007394 None
pwrmgr_csr_mem_rw_with_rand_reset 95351789528448637946188382693364957651368725519277343871005359340916539264285 None
pwrmgr_tl_intg_err 717803061141899366202267230139570650068485427788843544415210499631373885166 None
pwrmgr_sec_cm 81646159879915319707631608575643677743139006885937613438963850742042875746049 None
pwrmgr_stress_all_with_rand_reset 7505349268354808047101446369141762796869222548645388854680660990663807991174 None
pwrmgr_glitch 79535995472447223035763841283606835689232049046396379888075247163735343079027 None
pwrmgr_tl_intg_err 102762065843051629329164228970591399330997209099369834717191323705802751947938 None
pwrmgr_stress_all_with_rand_reset 39422386869894218858284253543761777798191278623522996106931065949997821479288 None
pwrmgr_glitch 102415043285702156778232872545775436385318406352896625411994882900754508434904 None
pwrmgr_tl_intg_err 51935399727963615290654698006261979023031611200473880100313288480973518256659 None
pwrmgr_stress_all_with_rand_reset 97300202676900490002145306928662621616574521949442040282143555385913287758358 None
pwrmgr_stress_all 106297708741653099273625653626025151740241813046301275451452255662360889557889 None
pwrmgr_glitch 101182787670020018898546518216843244663722854869329718027837385706904936458893 None
pwrmgr_tl_intg_err 11864893251965885550699785605614032602083638438929855868479931977069191500348 None
pwrmgr_stress_all_with_rand_reset 14528403004634241690442189948404712694478285466367751157407153994638538575921 None
pwrmgr_tl_intg_err 45785496326355784198846437955082988662069981585098648245313605564378401279154 None
pwrmgr_stress_all_with_rand_reset 110094963461292608215598269042894407806307757658794833344438506898247447186396 None
pwrmgr_glitch 43563250980578758926711901294758151497492519196836653807623258826864356299434 None
pwrmgr_tl_intg_err 78992948741895905723511511703349449803772787257284909353091866298598024774815 None
pwrmgr_stress_all_with_rand_reset 14374480876116192020657464000977550651734956978487573709304506173155941917940 None
pwrmgr_tl_intg_err 65266280440837679109384845373801496280981636913088551465868611487326292432378 None
pwrmgr_tl_intg_err 39288779112930987024487254765051241326687745971426302361958304615822314930414 None
pwrmgr_tl_intg_err 71873646956055576358519450534427439675555984302294696003213265582192783534923 None
pwrmgr_tl_intg_err 48808230414172696992866702937751890789578142762797240622146284021437475904380 None
pwrmgr_tl_intg_err 1059027260384522292743392456368276270497217973441587088775324662766542672476 None
pwrmgr_tl_intg_err 109986514330884804517141252975741828116320608225276416584004608658764375151361 None
pwrmgr_tl_intg_err 14817582441522683447351633518262760346908823358900697335361687400881705072451 None
pwrmgr_tl_intg_err 95530987493120879523808107737816708608465341798791846615513598853742377951607 None
pwrmgr_tl_intg_err 71487004566443880840783440332559431861483728459680242299192434894495250092293 None
pwrmgr_tl_intg_err 60829529368702118386184447189443654926738984294806613039596305286956333636947 None
pwrmgr_tl_intg_err 37487099025666750250226309267263993346579896875818270976100903918675391202211 None
pwrmgr_tl_intg_err 43415839503264025440455891100358747673444680919995581088128395265424689314873 None
Offending '((!clk_en) || status)' 3 test runs
pwrmgr_escalation_timeout 53883669066672351457405490756380999468852980308427067688263509574343333954178 85
UVM_ERROR @ 369762839 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 369762839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 18663754841803494868860372725939840702385812061152560888222369623747331528234 85
UVM_ERROR @ 100669182 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 100669182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 31175444799212888987507332883428301521154286160804309326521155218402885897782 85
UVM_ERROR @ 371560039 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 371560039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_vseq.sv:62) [pwrmgr_reset_vseq] wait timeout occurred! 3 test runs
pwrmgr_stress_all 15218135608644848192175564845932572729214123873898987175078028160029049207002 742
UVM_INFO @ 11548278694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 53624316036878811137092845627951652444841375775067222112256171721390273854115 149
UVM_INFO @ 10051824717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_stress_all 65807815551553136328297315435461718575357355034376828429300510578131299858468 208
UVM_INFO @ 10262210633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 2 test runs
pwrmgr_reset 58495244811849512243719888974562481548037809623450258077622750175807658693461 126
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 87981519638528283748660422913758957707892624472992043348160578656500768194965 182
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitReleaseLcRst 1 test run
pwrmgr_reset_invalid 32247550556010605341028145495395526339576276966571622031283501963767229235660 117
UVM_INFO @ 74259273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitDisClks 1 test run
pwrmgr_reset_invalid 41272625608871834316302750770380141748157702979530954937299420326293245547675 82
UVM_INFO @ 29087606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitLowPower 1 test run
pwrmgr_reset_invalid 71551989305941818848661712713630309657660871066106297940501414231493731367448 89
UVM_INFO @ 64297595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---