| V1 |
|
100.00% |
| V2 |
|
96.33% |
| V2S |
|
91.22% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 3.000s | 105.177us | 1 | 1 | 100.00 | |
| smoke | 10 | 10 | 100.00 | |||
| aes_smoke | 6.000s | 231.358us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 116.869us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| aes_csr_rw | 3.000s | 89.495us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| aes_csr_bit_bash | 7.000s | 391.317us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| aes_csr_aliasing | 2.000s | 92.002us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 3.000s | 78.441us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| aes_csr_rw | 3.000s | 89.495us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 92.002us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 70 | 70 | 100.00 | |||
| aes_smoke | 6.000s | 231.358us | 10 | 10 | 100.00 | |
| aes_config_error | 8.000s | 351.627us | 50 | 50 | 100.00 | |
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| key_length | 70 | 70 | 100.00 | |||
| aes_smoke | 6.000s | 231.358us | 10 | 10 | 100.00 | |
| aes_config_error | 8.000s | 351.627us | 50 | 50 | 100.00 | |
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| back2back | 35 | 35 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| aes_b2b | 9.000s | 246.639us | 25 | 25 | 100.00 | |
| backpressure | 10 | 10 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| multi_message | 95 | 95 | 100.00 | |||
| aes_smoke | 6.000s | 231.358us | 10 | 10 | 100.00 | |
| aes_config_error | 8.000s | 351.627us | 50 | 50 | 100.00 | |
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| aes_alert_reset | 5.000s | 1872.804us | 25 | 25 | 100.00 | |
| failure_test | 85 | 85 | 100.00 | |||
| aes_man_cfg_err | 3.000s | 76.262us | 10 | 10 | 100.00 | |
| aes_config_error | 8.000s | 351.627us | 50 | 50 | 100.00 | |
| aes_alert_reset | 5.000s | 1872.804us | 25 | 25 | 100.00 | |
| trigger_clear_test | 10 | 10 | 100.00 | |||
| aes_clear | 4.000s | 94.172us | 10 | 10 | 100.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 6.000s | 390.175us | 1 | 1 | 100.00 | |
| reset_recovery | 25 | 25 | 100.00 | |||
| aes_alert_reset | 5.000s | 1872.804us | 25 | 25 | 100.00 | |
| stress | 10 | 10 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| sideload | 20 | 20 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| aes_sideload | 5.000s | 217.838us | 10 | 10 | 100.00 | |
| deinitialization | 10 | 10 | 100.00 | |||
| aes_deinit | 4.000s | 115.869us | 10 | 10 | 100.00 | |
| stress_all | 2 | 10 | 20.00 | |||
| aes_stress_all | 10801.000s | 0.000us | 2 | 10 | 20.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| aes_alert_test | 2.000s | 97.694us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 5.000s | 320.244us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| aes_tl_errors | 5.000s | 320.244us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 116.869us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 89.495us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 92.002us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 82.519us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| aes_csr_hw_reset | 2.000s | 116.869us | 1 | 1 | 100.00 | |
| aes_csr_rw | 3.000s | 89.495us | 5 | 5 | 100.00 | |
| aes_csr_aliasing | 2.000s | 92.002us | 1 | 1 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 82.519us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 6 | 10 | 60.00 | |||
| aes_reseed | 5.000s | 392.718us | 6 | 10 | 60.00 | |
| fault_inject | 587 | 660 | 88.94 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| shadow_reg_update_error | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| shadow_reg_read_clear_staged_value | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| shadow_reg_storage_error | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| shadowed_reset_glitch | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| shadow_reg_update_error_with_csr_rw | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 5.000s | 852.078us | 19 | 20 | 95.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| aes_sec_cm | 6.000s | 4592.280us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 4.000s | 340.142us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| aes_tl_intg_err | 4.000s | 340.142us | 25 | 25 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 25 | 25 | 100.00 | |||
| aes_alert_reset | 5.000s | 1872.804us | 25 | 25 | 100.00 | |
| sec_cm_main_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| sec_cm_gcm_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| sec_cm_main_config_sparse | 138 | 145 | 95.17 | |||
| aes_smoke | 6.000s | 231.358us | 10 | 10 | 100.00 | |
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| aes_alert_reset | 5.000s | 1872.804us | 25 | 25 | 100.00 | |
| aes_core_fi | 220.000s | 10013.642us | 93 | 100 | 93.00 | |
| sec_cm_gcm_config_sparse | 153 | 160 | 95.62 | |||
| aes_config_error | 8.000s | 351.627us | 50 | 50 | 100.00 | |
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| aes_core_fi | 220.000s | 10013.642us | 93 | 100 | 93.00 | |
| sec_cm_aux_config_shadow | 19 | 20 | 95.00 | |||
| aes_shadow_reg_errors | 3.000s | 749.336us | 19 | 20 | 95.00 | |
| sec_cm_aux_config_regwen | 20 | 20 | 100.00 | |||
| aes_readability | 3.000s | 65.541us | 10 | 10 | 100.00 | |
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| sec_cm_key_sideload | 20 | 20 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| aes_sideload | 5.000s | 217.838us | 10 | 10 | 100.00 | |
| sec_cm_key_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 65.541us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 65.541us | 10 | 10 | 100.00 | |
| sec_cm_key_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 65.541us | 10 | 10 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 65.541us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 10 | 10 | 100.00 | |||
| aes_readability | 3.000s | 65.541us | 10 | 10 | 100.00 | |
| sec_cm_data_reg_key_sca | 10 | 10 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| sec_cm_key_masking | 10 | 10 | 100.00 | |||
| aes_stress | 4.000s | 761.869us | 10 | 10 | 100.00 | |
| sec_cm_main_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| sec_cm_main_fsm_redun | 612 | 685 | 89.34 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| aes_ctr_fi | 3.000s | 87.057us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| sec_cm_cipher_fsm_redun | 587 | 660 | 88.94 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| sec_cm_cipher_ctr_redun | 315 | 350 | 90.00 | |||
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| sec_cm_ctr_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| sec_cm_ctr_fsm_redun | 297 | 335 | 88.66 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_ctr_fi | 3.000s | 87.057us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_sparse | 0 | 10 | 0.00 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| sec_cm_ctrl_sparse | 612 | 685 | 89.34 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| aes_ctr_fi | 3.000s | 87.057us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_global_esc | 25 | 25 | 100.00 | |||
| aes_alert_reset | 5.000s | 1872.804us | 25 | 25 | 100.00 | |
| sec_cm_main_fsm_local_esc | 612 | 685 | 89.34 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| aes_ctr_fi | 3.000s | 87.057us | 25 | 25 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 612 | 685 | 89.34 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| aes_ctr_fi | 3.000s | 87.057us | 25 | 25 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 297 | 335 | 88.66 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_ctr_fi | 3.000s | 87.057us | 25 | 25 | 100.00 | |
| sec_cm_ghash_fsm_local_esc | 0 | 10 | 0.00 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| sec_cm_data_reg_local_esc | 587 | 660 | 88.94 | |||
| aes_fi | 4.000s | 114.555us | 0 | 10 | 0.00 | |
| aes_control_fi | 61.000s | 0.000us | 272 | 300 | 90.67 | |
| aes_cipher_fi | 61.000s | 0.000us | 315 | 350 | 90.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 35.000s | 3818.731us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | 24 test runs | |||
| aes_stress_all | 103566376429566886659102718487569298431168778910211123866201190144815126476895 | None | ||
| aes_cipher_fi | 29119941972979881259896177407613734727668297883637422863442674864076233531121 | None | ||
| aes_cipher_fi | 29285226178112163115876403469156045335795342911148181050348043742702355542750 | None | ||
| aes_cipher_fi | 78928425379650991246159484946392936357944766250750712643846479963097359642402 | None | ||
| aes_control_fi | 31389913735346352674295126091438472425857686660206020161192689215153000165607 | None | ||
| aes_control_fi | 44041724263303239960512226443371978033054009309789210403054404020998370493183 | None | ||
| aes_control_fi | 95509690290673906623593865199931450108153126835427928220103198548747324706153 | None | ||
| aes_control_fi | 62285353455616925083212789095895074381426815742060520431575189067541981080741 | None | ||
| aes_cipher_fi | 51481537742154980465908301081633722306430304827136026800171127517184897963077 | None | ||
| aes_cipher_fi | 27894189066745149496803748441089253337766891169673041236239892929621794256715 | None | ||
| aes_cipher_fi | 107026615621902661144552984155415345927891164438968038172292090800879763060457 | None | ||
| aes_control_fi | 79771406347267468157852796691207612590320595455072420605274167626813887946712 | None | ||
| aes_cipher_fi | 32988898143387305098788105686654125173722718047446006089676472185986007930717 | None | ||
| aes_cipher_fi | 87337172330180301382581129217961213850724676167792771264068624210722302062058 | None | ||
| aes_cipher_fi | 50957163052315629155488593664512734638772831197798124212517204682462252075990 | None | ||
| aes_cipher_fi | 39049342562319223274425806431618514124826106773866797880849043646134480602004 | None | ||
| aes_cipher_fi | 104356557110966471865409443543145411052531434478631452704337257725996548725243 | None | ||
| aes_cipher_fi | 33103012157504291264533206969161354189850912913860874727162980955596347271518 | None | ||
| aes_control_fi | 87189682247666000596747096208469204610703474515015237158268354292509834607383 | None | ||
| aes_control_fi | 18585582795487266341051635374324571621902341293530365769249564753139752826634 | None | ||
| aes_cipher_fi | 92692071216065896661555234918785788653191589620596987842733874480702642485608 | None | ||
| aes_cipher_fi | 46548923629667410648908872304021269093896226984652565151792634551663494322187 | None | ||
| aes_cipher_fi | 3677929184160564158187561056439608033380435594349647483386506208861333019149 | None | ||
| aes_cipher_fi | 103069018231291112042380132825832865518156892550820807855591873000038334014402 | None | ||
| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | 21 test runs | |||
| aes_control_fi | 98499513459522073438888938859162414272309602274929227288566346613049673232875 | 157 |
UVM_INFO @ 10006801579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 77237226662617458673681872981285901398453721166620599784572199112105469305078 | 157 |
UVM_INFO @ 10012414393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 32056515605521967423143141984157304278764870383383666663347957533608545172904 | 143 |
UVM_INFO @ 10008606304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 103377671571788716393432303994584423722348886601497990347893434674894809847161 | 150 |
UVM_INFO @ 10008710564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 42271439137924890591850201090979293237190774112664909621072919280168977713341 | 149 |
UVM_INFO @ 10013431108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 10402951506272993506196351837463054152353740378251479087008918434098923008368 | 153 |
UVM_INFO @ 10004647558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 53970318299311891623376328389344359013052450576696546093247103366982975700005 | 138 |
UVM_INFO @ 10010291478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 92320533145666218914633697843983994001553034309138987201220355136104198786419 | 139 |
UVM_INFO @ 10013784966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 62862999040967877469924020547588751115564652979775169048211916849643402881987 | 150 |
UVM_INFO @ 10014306259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 69825531428735364412493170991527912169405518299001144197151100708297348880051 | 145 |
UVM_INFO @ 10017870116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 77624500931170303834063662671463170459526867801453125921481877597215559251378 | 140 |
UVM_INFO @ 10003122213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 22150853801880366899572190912146375972104755367839007776499732698765773473851 | 146 |
UVM_INFO @ 10022618069 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 36177588517133974302666580946622247045476763226562006882564439553919609614839 | 145 |
UVM_INFO @ 10011152284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 11143832328313964598742356124429124685436541352411286283275974281836120636768 | 145 |
UVM_INFO @ 10004462093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 58568360259405190859052024231763020631781782565827403764017425798709807662336 | 148 |
UVM_INFO @ 10005521018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 103073351710074908789327410694451793503295006130162502999987154459415629222374 | 142 |
UVM_INFO @ 10003683699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 94858184657649916949194644405949990396254297111133728769126746466569109825170 | 144 |
UVM_INFO @ 10008642194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 73353933748451957603227419122002496024258582283221871336937971640944207870201 | 141 |
UVM_INFO @ 10011160256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 44084799287069569118742470422756271544817878553027135384795855336818670619893 | 142 |
UVM_INFO @ 10002688336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 2057482650005264168910907916232345678921350601084292928101744739499169746053 | 147 |
UVM_INFO @ 10006950728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_control_fi | 71438449331922499301805189320522543825126015299998802855573803449292457191938 | 140 |
UVM_INFO @ 10031467101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | 19 test runs | |||
| aes_cipher_fi | 77418675699555053855681026070387245653855907471324519771901446707335980658696 | 148 |
UVM_INFO @ 10009030671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 71038981894163774325145751693291595532362944071977952180069947828129054726434 | 139 |
UVM_INFO @ 10004810008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 55527444947981748722227079192296150910493158737019999216785584926661092817986 | 145 |
UVM_INFO @ 10008322313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 54739931720475413852122900797267113800248142898290129873951518048299852861900 | 143 |
UVM_INFO @ 10042354229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 97349264907461537639437071389990698370526229308382290022988449144128542267496 | 153 |
UVM_INFO @ 10025347019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 29563042026261254310215365054393433531831824463439161533402031011129174269125 | 151 |
UVM_INFO @ 10004958384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 32205294214021195932015505908097023071111908614412041198938491711601005051665 | 139 |
UVM_INFO @ 10007229623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 101814692055526041932601929452859690858928654525797874547963061373337561681360 | 148 |
UVM_INFO @ 10010606703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 66875609944160291747725877990300508811636713610096823759877622562376244774259 | 151 |
UVM_INFO @ 10006910404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 27503154220506904821428490043451954102761420085757827830816488307601743775120 | 139 |
UVM_INFO @ 10015045020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 102246878814680366841811384985701650928715824530552257945366085341329523181574 | 144 |
UVM_INFO @ 10030602293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 47528045859894434453363609789429090402588113051719587052589476609072779812893 | 141 |
UVM_INFO @ 10011605185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 87762538272908672929665282971917688013966020772318119349503623208360159508925 | 139 |
UVM_INFO @ 10014081747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 33394122557329613179525999593500899667798277998115277361006605642402838039235 | 142 |
UVM_INFO @ 10005812619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 80030705690605450663786054069531233949344274563657603610679276184070306301680 | 143 |
UVM_INFO @ 10012243528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 99926818731349397992161404354412140557711007267606422981107463333842951040176 | 141 |
UVM_INFO @ 10012725470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 93922705688941113827571209596066158928910111304238674874406446117415523537709 | 142 |
UVM_INFO @ 10011429352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 42497802174155943657254286059084033424306892786773749666174411591482687208508 | 138 |
UVM_INFO @ 10006294344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 107954611055050607640132381006125116761846945533202039708413164359201916412366 | 150 |
UVM_INFO @ 10004810042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | 13 test runs | |||
| aes_stress_all_with_rand_reset | 54400911420849785407011461299936826285685329855088749415220389733242772103267 | 369 |
UVM_INFO @ 181999439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 48177023072716466970835806740163011491923515986864226640116158254562783361053 | 5497 |
UVM_INFO @ 392717730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 27456123541946919082547958875939977647376380900641455191465721212916905146587 | 2868 |
UVM_INFO @ 241201636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 55308597498853097708037976991597582743584305564401414078280404208393970025348 | 8607 |
UVM_INFO @ 113938171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 77285736086157354009108514857972951499876500732700995436926875398766181890158 | 531 |
UVM_INFO @ 693584624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 20364910477288067002232743850414735746432562829441812779144463361322930992714 | 15261 |
UVM_INFO @ 320400571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 31750468538191179885526598706622736885555067756778176044116645169893374095824 | 188 |
UVM_INFO @ 410060470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 95374786992906246193966343673459399098466637116657240039421164038665666642237 | 549 |
UVM_INFO @ 658018823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 104666119030749554509405636509128327976671800108739084379870375256460137084035 | 944 |
UVM_INFO @ 18813244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 40235806289926941142222311978086600066728255293974363709894931581331684728972 | 4801 |
UVM_INFO @ 16027082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all | 63259784485916520038838095675794402429310433755039746089823780751258734234188 | 12237 |
UVM_INFO @ 961909032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_reseed | 115647160958194894384077920379842190602953407530396441363195207963042885439112 | 2330 |
UVM_INFO @ 244788426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 17265230501654408751253792246066454218615764428320163764025571932500318436098 | 723 |
UVM_INFO @ 1314422859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] | 11 test runs | |||
| aes_fi | 66457528659007029065208142628267257332591208334864887792914702892901339797545 | 6751 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 107974563793088659157318983719096872238545360670407602566140728539002418593903 | 4580 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 52375530332182384206488170606028488668037341518371129923104597977514014574650 | 4627 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 1
----| Expected corrupted: 0
|
|
| aes_fi | 22846577304339133817142733744318549125397780362016994881585528912604289805767 | 6887 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 44767132446001060891033684107216284716307679732334857426484204577403282860141 | 9438 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 11006258724005126607584366216685036385319274598184308247561718221384485823441 | 6417 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 2
----| Expected corrupted: 0
|
|
| aes_fi | 56536587189767045081939335823719034093208895593610765892051158939300529744805 | 6267 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 98436150716086091982912617486576678603568894591504240674453176614950020975150 | 6178 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 5
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_fi | 5060316664715743441324638557680973662684070006763324904216477069043384652505 | 7095 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
|
|
| aes_fi | 40110258530620509100200735790124490618718452330501091891173379663926561513621 | 5691 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 4
----| Expected corrupted: 0
|
|
| aes_stress_all | 9796766583486073705225054141514494897252226891392911491008159385957409309779 | 30644 |
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 2
----| Seen: 1
----| Expected corrupted: 0
|
|
| UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! | 5 test runs | |||
| aes_core_fi | 112617738340758460507485278308860825298573868084074757414058317909167688367752 | 152 |
UVM_INFO @ 10008209653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 52428695447469510154582513183024963021471443419262241135821579318945888481251 | 141 |
UVM_INFO @ 10012400035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 102736626569114736967829973020294871252518056066329846279081305919591619319275 | 147 |
UVM_INFO @ 10021388685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 3960848354877763598438959112969337891538709146178399295985894370397173146217 | 149 |
UVM_INFO @ 10006886084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 5617595443190015560576480581056809875255662039260614399937761583136736251368 | 145 |
UVM_INFO @ 10014583104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) | 3 test runs | |||
| aes_stress_all_with_rand_reset | 15874078889941951256977889650419587975580417065395066367315240060799049066232 | 406 |
UVM_INFO @ 3818730760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 105147418437948717837615977722428205369238429062609359238743117866759855932255 | 171 |
UVM_INFO @ 29473844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 51422847707453170159174004166048676192581115519410209904206273210364065788894 | 605 |
UVM_INFO @ 2972788025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block_extended.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) | 2 test runs | |||
| aes_core_fi | 81100804280202540096563556329766500728708157412208810271872534328328827990647 | 141 |
UVM_INFO @ 10028034300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_core_fi | 3836860056906817809573809491028140527496646585178549758662856715906068720240 | 144 |
UVM_INFO @ 10013642206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1143): Assertion AesSecCmDataRegLocalEscIv has failed (* cycles, starting * PS) | 1 test run | |||
| aes_stress_all | 9427791469606839512909736685462609090421378348737145985107168311130556187869 | 1869 |
UVM_ERROR @ 57103135 ps: (aes_core.sv:1143) [ASSERT FAILED] AesSecCmDataRegLocalEscIv
UVM_INFO @ 57103135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_base_vseq.sv:104) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 39827392826593050072759138658936913339649355786043779537818648490952178640913 | 109 |
UVM_INFO @ 92259241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:782) scoreboard [scoreboard] # * | 1 test run | |||
| aes_stress_all | 113251405572607254429555706690761237574458103960993602539757632301021620845263 | 11220 |
TEST FAILED MESSAGES DID NOT MATCH
0 4a 08 08 0
1 00 9d 9d 0
|
|
| UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | 1 test run | |||
| aes_stress_all_with_rand_reset | 31065989107896295225926908023454003329129859723775399587482103626444017253782 | 109 |
UVM_INFO @ 4535692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1391) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! | 1 test run | |||
| aes_shadow_reg_errors_with_csr_rw | 79776282793786424223546235730311782354985958214452647298327489663280797078763 | 106 |
UVM_INFO @ 59951758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:463) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: aes_reg_block_extended.ctrl_shadowed reset value: * | 1 test run | |||
| aes_shadow_reg_errors | 105225061053331629412996791319084375052021698622614327250501492844660246467842 | 106 |
UVM_INFO @ 22536164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|