Simulation Results

Simulation Results: alert_handler

12/09/2026 09:15:14 DVSim: v1.49.0 sha: fca045d json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
98.90 %

code
98.77 %

assert
98.89 %

func
99.04 %

line
99.99 %

branch
99.99 %

cond
97.45 %

toggle
96.40 %

FSM
100.00 %

Validation stages

V1		100.00%
V2		86.79%
V2S		94.15%
V3		30.00%

23/23 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				10	10	100.00
	alert_handler_smoke	52.130s	3185.101us	10	10	100.00
csr_hw_reset				1	1	100.00
	alert_handler_csr_hw_reset	9.130s	527.118us	1	1	100.00
csr_rw				5	5	100.00
	alert_handler_csr_rw	11.210s	117.519us	5	5	100.00
csr_bit_bash				1	1	100.00
	alert_handler_csr_bit_bash	273.430s	10291.359us	1	1	100.00
csr_aliasing				1	1	100.00
	alert_handler_csr_aliasing	37.390s	1675.889us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	alert_handler_csr_mem_rw_with_rand_reset	9.920s	96.778us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				6	6	100.00
	alert_handler_csr_rw	11.210s	117.519us	5	5	100.00
	alert_handler_csr_aliasing	37.390s	1675.889us	1	1	100.00

440/507 passed

86.79 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
esc_accum				25	25	100.00
	alert_handler_esc_alert_accum	375.310s	12808.638us	25	25	100.00
esc_timeout				50	50	100.00
	alert_handler_esc_intr_timeout	97.240s	2655.946us	50	50	100.00
entropy				24	25	96.00
	alert_handler_entropy	3600.136s	0.000us	24	25	96.00
sig_int_fail				48	50	96.00
	alert_handler_sig_int_fail	75.850s	4619.711us	48	50	96.00
clk_skew				10	10	100.00
	alert_handler_smoke	52.130s	3185.101us	10	10	100.00
random_alerts				10	10	100.00
	alert_handler_random_alerts	80.660s	5148.306us	10	10	100.00
random_classes				50	50	100.00
	alert_handler_random_classes	92.720s	3199.771us	50	50	100.00
ping_timeout				23	50	46.00
	alert_handler_ping_timeout	757.830s	58365.035us	23	50	46.00
lpg				84	100	84.00
	alert_handler_lpg	3600.148s	0.000us	41	50	82.00
	alert_handler_lpg_stub_clk	3600.172s	0.000us	43	50	86.00
stress_all				48	50	96.00
	alert_handler_stress_all	5320.730s	97458.251us	48	50	96.00
alert_handler_entropy_stress_test				1	20	5.00
	alert_handler_entropy_stress	29.540s	553.086us	1	20	5.00
alert_handler_alert_accum_saturation				20	20	100.00
	alert_handler_alert_accum_saturation	5.910s	65.401us	20	20	100.00
intr_test				10	10	100.00
	alert_handler_intr_test	2.460s	11.192us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	alert_handler_tl_errors	39.350s	460.090us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	alert_handler_tl_errors	39.350s	460.090us	25	25	100.00
tl_d_outstanding_access				12	12	100.00
	alert_handler_csr_hw_reset	9.130s	527.118us	1	1	100.00
	alert_handler_csr_rw	11.210s	117.519us	5	5	100.00
	alert_handler_csr_aliasing	37.390s	1675.889us	1	1	100.00
	alert_handler_same_csr_outstanding	52.850s	677.979us	5	5	100.00
tl_d_partial_access				12	12	100.00
	alert_handler_csr_hw_reset	9.130s	527.118us	1	1	100.00
	alert_handler_csr_rw	11.210s	117.519us	5	5	100.00
	alert_handler_csr_aliasing	37.390s	1675.889us	1	1	100.00
	alert_handler_same_csr_outstanding	52.850s	677.979us	5	5	100.00

V2S

193/205 passed

94.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				20	20	100.00
	alert_handler_shadow_reg_errors	440.730s	5459.222us	20	20	100.00
shadow_reg_read_clear_staged_value				20	20	100.00
	alert_handler_shadow_reg_errors	440.730s	5459.222us	20	20	100.00
shadow_reg_storage_error				20	20	100.00
	alert_handler_shadow_reg_errors	440.730s	5459.222us	20	20	100.00
shadowed_reset_glitch				20	20	100.00
	alert_handler_shadow_reg_errors	440.730s	5459.222us	20	20	100.00
shadow_reg_update_error_with_csr_rw				20	20	100.00
	alert_handler_shadow_reg_errors_with_csr_rw	1310.790s	16420.173us	20	20	100.00
tl_intg_err				30	30	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
	alert_handler_tl_intg_err	100.880s	9083.831us	25	25	100.00
sec_cm_bus_integrity				25	25	100.00
	alert_handler_tl_intg_err	100.880s	9083.831us	25	25	100.00
sec_cm_config_shadow				20	20	100.00
	alert_handler_shadow_reg_errors	440.730s	5459.222us	20	20	100.00
sec_cm_ping_timer_config_regwen				10	10	100.00
	alert_handler_smoke	52.130s	3185.101us	10	10	100.00
sec_cm_alert_config_regwen				10	10	100.00
	alert_handler_smoke	52.130s	3185.101us	10	10	100.00
sec_cm_alert_loc_config_regwen				10	10	100.00
	alert_handler_smoke	52.130s	3185.101us	10	10	100.00
sec_cm_class_config_regwen				10	10	100.00
	alert_handler_smoke	52.130s	3185.101us	10	10	100.00
sec_cm_alert_intersig_diff				48	50	96.00
	alert_handler_sig_int_fail	75.850s	4619.711us	48	50	96.00
sec_cm_lpg_intersig_mubi				41	50	82.00
	alert_handler_lpg	3600.148s	0.000us	41	50	82.00
sec_cm_esc_intersig_diff				48	50	96.00
	alert_handler_sig_int_fail	75.850s	4619.711us	48	50	96.00
sec_cm_alert_rx_intersig_bkgn_chk				24	25	96.00
	alert_handler_entropy	3600.136s	0.000us	24	25	96.00
sec_cm_esc_tx_intersig_bkgn_chk				24	25	96.00
	alert_handler_entropy	3600.136s	0.000us	24	25	96.00
sec_cm_esc_timer_fsm_sparse				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_ping_timer_fsm_sparse				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_esc_timer_fsm_local_esc				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_ping_timer_fsm_local_esc				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_esc_timer_fsm_global_esc				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_accu_ctr_redun				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_esc_timer_ctr_redun				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_ping_timer_ctr_redun				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00
sec_cm_ping_timer_lfsr_redun				5	5	100.00
	alert_handler_sec_cm	201.460s	5235.316us	5	5	100.00

3/10 passed

30.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				3	10	30.00
	alert_handler_stress_all_with_rand_reset	409.940s	6069.241us	3	10	30.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (alert_handler_scoreboard.sv:482) [scoreboard] Check failed intr_state_val == item.d_data (* [] vs [*]) reg name: intr_state				22 test runs
	alert_handler_ping_timeout	67878121950483349282561075437771410406811653635848558667783696036941144206801	132	UVM_INFO @ 32324927691 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	86864915315729017754520899108234789223387814279864755399040759999063127450845	135	UVM_INFO @ 13276851260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	8365316886194673300006530309332906942477158911866516921199451524744453568681	114	UVM_INFO @ 4607342784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	94169740188963590615634876166804311824437326766034328616493786237605671461653	156	UVM_INFO @ 18181169721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	112085803174123544062848323046288051627965102578003718955689807980058300748669	93	UVM_INFO @ 1596008110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	59698204669373331687521623920158463048056767934984168935243271827891487278374	93	UVM_INFO @ 15768624892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	77587463634629967064968904555944905370013720989881975638902343435912251704470	108	UVM_INFO @ 2444641765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	113195834503331791210707327505332538522083884442671053877477793392169185213536	99	UVM_INFO @ 8366794139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	64760739725662983171427121065239408231405756550565288699441214657440791560121	90	UVM_INFO @ 708915329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	19418342096276776734615282665273235552687403003649503613873112951588458321884	126	UVM_INFO @ 6888975129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	77641705067743099493208339754006607041284557071002354326751468129343568260566	162	UVM_INFO @ 18256619601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	68226477088038231691841676508689234623712058897599889396467467056702510635596	96	UVM_INFO @ 5028159020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	40086626215635553077291723517330956489667671138981617674812928171057285167900	111	UVM_INFO @ 4456246490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	47837350528537238470834359672574443007500105864943115917468161545496125255188	115	UVM_INFO @ 23313735967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	47825486936751058924522725139755514162807187803853049143168235630736283362996	96	UVM_INFO @ 1535500171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	34181030307407333540220700886079528839110991794522531565387360938471265318299	114	UVM_INFO @ 22434408682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	25344534307665450340772886641828257166049823596246039920089178243766242223800	96	UVM_INFO @ 3577741220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	103030230977004784563459405277795419505628722716716860729548403250644964678541	126	UVM_INFO @ 63803321955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	52588820835067078496925555369970890972949026553415029300992298493196350660927	102	UVM_INFO @ 11252258618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	33726581255084745947499148090891728115454808465165181225115111733294168687298	165	UVM_INFO @ 23811118364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	52563854332425915510705267174376572662654998162841882265197083108866026182718	102	UVM_INFO @ 2548639201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	111100266840660293101535599353173252153329485477407794832013050518499421517527	118	UVM_INFO @ 13444643851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped				19 test runs
	alert_handler_entropy_stress	49997492515513492096633187006991623130568964305712077244927952390013837507593	206	UVM_INFO @ 1968488324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	86700329274950084653626510167765663111061475632231749557400234219394178937884	214	UVM_INFO @ 2786273199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	6305642914147296770283627041199476665594374359530446570287285873870780822291	202	UVM_INFO @ 738404722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	12398652671274417612238043274727163839970920116956172987340980914901414258189	182	UVM_INFO @ 553085601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	8763263713011438949017566500925605940835989499349560711462539318070786289204	174	UVM_INFO @ 1725799231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	97936323913127749224678835032142084994904203395429477577795713554383644421476	202	UVM_INFO @ 508438059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	96040285378456960973959007781844877718282359213855379997671733343643998973313	150	UVM_INFO @ 253959199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	107795801825800543941404554249489328169607993849129949797552880755842637138	194	UVM_INFO @ 144289384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	55856257047041567988505732237914194290865938719573771580044504001192914650440	204	UVM_INFO @ 746971817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	88817920278619418903511940415001651348139127395328607017435156749904327272633	214	UVM_INFO @ 1550042883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	74203154000517176735858223890771425049468255285428793227353440853952313239078	196	UVM_INFO @ 1659667279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	1698958998292246413690345216533984979611085077185415635940829449216525736363	208	UVM_INFO @ 125947851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	65385150793865363906650794527064032404248054073992307959966883249174864723970	184	UVM_INFO @ 281732734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	28246373952785273151432977413078097692738241741116851279657886402997769287942	208	UVM_INFO @ 1478360112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	75175863362582045614411479404334107413079629123168451730739117841351636398403	180	UVM_INFO @ 2263971479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	91782915085428690277612780147781888200752707548303812523696817427548467042667	206	UVM_INFO @ 699050265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	36458637106898272683710444406710367864721869281299820999384051503456846545458	198	UVM_INFO @ 283906162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	64418602709402868399844762343299051011043884209032047849718976435901876699543	212	UVM_INFO @ 551664203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_entropy_stress	9254540138293165059206670647744785244744105926434113398546560193511335599420	210	UVM_INFO @ 436040383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Job timed out after * minutes				14 test runs
	alert_handler_lpg_stub_clk	10992661758735714599043710783989411695702774374569642601454646390395727040069	None
	alert_handler_lpg	23055387899432176549537034289522160355056905939681973316907805034464495612880	None
	alert_handler_lpg	36057897723640117232654937473250149020376425275470715514436078090634828867089	None
	alert_handler_lpg_stub_clk	106983410432690605553483711373736425753533569697950216556485755601802069129465	None
	alert_handler_entropy	18323809480215587767846157522545848934658340764007422624352578346865802266938	None
	alert_handler_lpg_stub_clk	38623832664747386926668021645164040202325279357298922900481954021890213307987	None
	alert_handler_lpg_stub_clk	12331687153913551646412757464909617717920179350271209033991960042913005451650	None
	alert_handler_lpg	106869515685867224233848808731085739917680970803183166551314513558533882931330	None
	alert_handler_lpg	28946515694706891623758555571346333687304915766334140186518103360634602791427	None
	alert_handler_lpg_stub_clk	10333987703139475446205066385886503949522343667986353196602117049423355662962	None
	alert_handler_lpg_stub_clk	83302926251274127777393181512669653374931443121192347122332667065977474589152	None
	alert_handler_lpg	41794867511844972940554423241494092411854212067526344107131801031041008066112	None
	alert_handler_lpg	114065007673394045554557131298841241902672517537389789350220123042629492106573	None
	alert_handler_lpg_stub_clk	59409526233352167362736150359193852826370571106396334040066535054548841201357	None
UVM_ERROR (cip_base_vseq.sv:1296) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				7 test runs
	alert_handler_stress_all_with_rand_reset	23077984650361954076937926069291731076811744451817499971017693147576372017384	89	UVM_INFO @ 455502698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	29846133207932221338975297617012201833844773040377305341786403528827938189180	89	UVM_INFO @ 109103633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	102824989278405283623985176334504055654772040973413148221885946723585624806528	125	UVM_INFO @ 1245001565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	110772705473204005847542547106348803216995636905542270324853244869810934046174	95	UVM_INFO @ 479660215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	68476259618597538843489617911595972048543511324533973127160832568689820596309	236	UVM_INFO @ 6069241037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	67626432620445070914342477291659816094533486171517406029464160895681790356695	115	UVM_INFO @ 6919039767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all_with_rand_reset	11858170368942496227199428416198054424980424801267957184850066621273160019239	107	UVM_INFO @ 5992663816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:604) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[] is in the crashdump and * in the register model.				5 test runs
	alert_handler_ping_timeout	37635883797184312917775144656734276512796705408989719388210874757928515490267	86	UVM_INFO @ 220757805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	33281991125971978209200466739091091759755909145752562996392467362471756990578	86	UVM_INFO @ 276243937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	61964847105610322324819907507180904718202554186703491917227498335093964555945	86	UVM_INFO @ 63466881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	98064219723933674372484440576484655073864167151614125808822743379570875418006	86	UVM_INFO @ 5310189261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_ping_timeout	56377933454706991650145524146874036411818909252516432481941656827276549015206	86	UVM_INFO @ 212568973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: alert_handler_reg_block.classa_state				2 test runs
	alert_handler_stress_all	268905319402566605515813078321437504616142956059989336177370025470738078683	349	UVM_INFO @ 78932487109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_sig_int_fail	50294593477600565409613397609109307295320358832337398332617285792369759330300	88	UVM_INFO @ 113282522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: alert_handler_reg_block.classc_state				2 test runs
	alert_handler_sig_int_fail	21802338333842950752418281286071916835385479324688979550278986195142074993922	87	UVM_INFO @ 70083391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	alert_handler_stress_all	29443231440115129106259878930347284511575845962849066981057847840404961012788	373	UVM_INFO @ 134513848987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: alert_handler_reg_block.classd_state				1 test run
	alert_handler_lpg	65126911594729834291301068402359188801306408656258796867932117694370177626928	86	UVM_INFO @ 30315688045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: alert_handler_reg_block.classa_accum_cnt				1 test run
	alert_handler_lpg	22334368233539248229324839517872565560343205536174748907218532840947742636782	86	UVM_INFO @ 26264276157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs []) reg name: alert_handler_reg_block.loc_alert_cause_				1 test run
	alert_handler_lpg	114017087077948406858907709844234712719426165175537139235834940567166727967957	86	UVM_INFO @ 23229245800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---