| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 10 | 10 | 100.00 | |||
| pwm_smoke | 5.000s | 1804.142us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| pwm_csr_hw_reset | 1.000s | 60.574us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| pwm_csr_rw | 2.000s | 77.057us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| pwm_csr_bit_bash | 4.000s | 169.946us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| pwm_csr_aliasing | 2.000s | 57.174us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| pwm_csr_mem_rw_with_rand_reset | 2.000s | 461.453us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| pwm_csr_rw | 2.000s | 77.057us | 5 | 5 | 100.00 | |
| pwm_csr_aliasing | 2.000s | 57.174us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dutycycle | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| pulse | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| blink | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| heartbeat | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| resolution | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| multi_channel | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| polarity | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| phase | 50 | 50 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| pwm_phase | 77.000s | 10940.436us | 25 | 25 | 100.00 | |
| lowpower | 25 | 25 | 100.00 | |||
| pwm_rand_output | 71.000s | 22250.997us | 25 | 25 | 100.00 | |
| perf | 10 | 10 | 100.00 | |||
| pwm_perf | 53.000s | 80742.630us | 10 | 10 | 100.00 | |
| regwen | 1 | 1 | 100.00 | |||
| pwm_regwen | 161.000s | 80778.567us | 1 | 1 | 100.00 | |
| stress_all | 25 | 25 | 100.00 | |||
| pwm_stress_all | 217.000s | 213450.648us | 25 | 25 | 100.00 | |
| alert_test | 10 | 10 | 100.00 | |||
| pwm_alert_test | 2.000s | 42.004us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 5 | 5 | 100.00 | |||
| pwm_tl_errors | 3.000s | 387.448us | 5 | 5 | 100.00 | |
| tl_d_illegal_access | 5 | 5 | 100.00 | |||
| pwm_tl_errors | 3.000s | 387.448us | 5 | 5 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| pwm_csr_hw_reset | 1.000s | 60.574us | 1 | 1 | 100.00 | |
| pwm_csr_rw | 2.000s | 77.057us | 5 | 5 | 100.00 | |
| pwm_csr_aliasing | 2.000s | 57.174us | 1 | 1 | 100.00 | |
| pwm_same_csr_outstanding | 2.000s | 28.868us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| pwm_csr_hw_reset | 1.000s | 60.574us | 1 | 1 | 100.00 | |
| pwm_csr_rw | 2.000s | 77.057us | 5 | 5 | 100.00 | |
| pwm_csr_aliasing | 2.000s | 57.174us | 1 | 1 | 100.00 | |
| pwm_same_csr_outstanding | 2.000s | 28.868us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 10 | 10 | 100.00 | |||
| pwm_tl_intg_err | 3.000s | 476.755us | 5 | 5 | 100.00 | |
| pwm_sec_cm | 2.000s | 69.716us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 5 | 5 | 100.00 | |||
| pwm_tl_intg_err | 3.000s | 476.755us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| heartbeat_wrap | 10 | 10 | 100.00 | |||
| pwm_heartbeat_wrap | 57.000s | 43736.216us | 10 | 10 | 100.00 | |