| V1 |
|
100.00% |
| V2 |
|
93.76% |
| V2S |
|
100.00% |
| V3 |
|
70.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 53.350s | 922.905us | 10 | 10 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.250s | 80.864us | 1 | 1 | 100.00 | |
| csr_rw | 5 | 5 | 100.00 | |||
| alert_handler_csr_rw | 6.490s | 113.297us | 5 | 5 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| alert_handler_csr_bit_bash | 208.020s | 6533.530us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| alert_handler_csr_aliasing | 239.990s | 14890.443us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 5 | 5 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 7.240s | 259.002us | 5 | 5 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 6 | 6 | 100.00 | |||
| alert_handler_csr_rw | 6.490s | 113.297us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 239.990s | 14890.443us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 25 | 25 | 100.00 | |||
| alert_handler_esc_alert_accum | 241.810s | 3807.851us | 25 | 25 | 100.00 | |
| esc_timeout | 25 | 25 | 100.00 | |||
| alert_handler_esc_intr_timeout | 56.400s | 868.893us | 25 | 25 | 100.00 | |
| entropy | 25 | 25 | 100.00 | |||
| alert_handler_entropy | 2469.060s | 59113.263us | 25 | 25 | 100.00 | |
| sig_int_fail | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 63.780s | 2275.043us | 50 | 50 | 100.00 | |
| clk_skew | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 53.350s | 922.905us | 10 | 10 | 100.00 | |
| random_alerts | 10 | 10 | 100.00 | |||
| alert_handler_random_alerts | 55.890s | 1890.489us | 10 | 10 | 100.00 | |
| random_classes | 50 | 50 | 100.00 | |||
| alert_handler_random_classes | 62.640s | 1065.657us | 50 | 50 | 100.00 | |
| ping_timeout | 3 | 10 | 30.00 | |||
| alert_handler_ping_timeout | 410.040s | 37041.579us | 3 | 10 | 30.00 | |
| lpg | 75 | 75 | 100.00 | |||
| alert_handler_lpg | 2600.770s | 112512.277us | 50 | 50 | 100.00 | |
| alert_handler_lpg_stub_clk | 2354.380s | 229327.524us | 25 | 25 | 100.00 | |
| stress_all | 50 | 50 | 100.00 | |||
| alert_handler_stress_all | 3180.710s | 313794.313us | 50 | 50 | 100.00 | |
| alert_handler_entropy_stress_test | 1 | 20 | 5.00 | |||
| alert_handler_entropy_stress | 28.700s | 2349.568us | 1 | 20 | 5.00 | |
| alert_handler_alert_accum_saturation | 20 | 20 | 100.00 | |||
| alert_handler_alert_accum_saturation | 4.750s | 60.638us | 20 | 20 | 100.00 | |
| intr_test | 10 | 10 | 100.00 | |||
| alert_handler_intr_test | 2.410s | 15.229us | 10 | 10 | 100.00 | |
| tl_d_oob_addr_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 20.840s | 348.551us | 25 | 25 | 100.00 | |
| tl_d_illegal_access | 25 | 25 | 100.00 | |||
| alert_handler_tl_errors | 20.840s | 348.551us | 25 | 25 | 100.00 | |
| tl_d_outstanding_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.250s | 80.864us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 6.490s | 113.297us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 239.990s | 14890.443us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 45.030s | 2123.266us | 5 | 5 | 100.00 | |
| tl_d_partial_access | 12 | 12 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.250s | 80.864us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 6.490s | 113.297us | 5 | 5 | 100.00 | |
| alert_handler_csr_aliasing | 239.990s | 14890.443us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 45.030s | 2123.266us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 348.980s | 5927.602us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 348.980s | 5927.602us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 348.980s | 5927.602us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 348.980s | 5927.602us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 985.060s | 12976.563us | 20 | 20 | 100.00 | |
| tl_intg_err | 30 | 30 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| alert_handler_tl_intg_err | 70.000s | 931.281us | 25 | 25 | 100.00 | |
| sec_cm_bus_integrity | 25 | 25 | 100.00 | |||
| alert_handler_tl_intg_err | 70.000s | 931.281us | 25 | 25 | 100.00 | |
| sec_cm_config_shadow | 20 | 20 | 100.00 | |||
| alert_handler_shadow_reg_errors | 348.980s | 5927.602us | 20 | 20 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 53.350s | 922.905us | 10 | 10 | 100.00 | |
| sec_cm_alert_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 53.350s | 922.905us | 10 | 10 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 53.350s | 922.905us | 10 | 10 | 100.00 | |
| sec_cm_class_config_regwen | 10 | 10 | 100.00 | |||
| alert_handler_smoke | 53.350s | 922.905us | 10 | 10 | 100.00 | |
| sec_cm_alert_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 63.780s | 2275.043us | 50 | 50 | 100.00 | |
| sec_cm_lpg_intersig_mubi | 50 | 50 | 100.00 | |||
| alert_handler_lpg | 2600.770s | 112512.277us | 50 | 50 | 100.00 | |
| sec_cm_esc_intersig_diff | 50 | 50 | 100.00 | |||
| alert_handler_sig_int_fail | 63.780s | 2275.043us | 50 | 50 | 100.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 25 | 25 | 100.00 | |||
| alert_handler_entropy | 2469.060s | 59113.263us | 25 | 25 | 100.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 25 | 25 | 100.00 | |||
| alert_handler_entropy | 2469.060s | 59113.263us | 25 | 25 | 100.00 | |
| sec_cm_esc_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_accu_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| alert_handler_sec_cm | 28.990s | 1686.922us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 7 | 10 | 70.00 | |||
| alert_handler_stress_all_with_rand_reset | 317.570s | 16160.851us | 7 | 10 | 70.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped | 19 test runs | |||
| alert_handler_entropy_stress | 25083917883253602707372874330005987905411712302160350804196810409432856966372 | 118 |
UVM_INFO @ 437225523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 86939034975029533027092387825786647196548519259225352191716838658453904404256 | 200 |
UVM_INFO @ 131838968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 59183040108745128575979380338526845928080224406002106169041100560523034939510 | 187 |
UVM_INFO @ 63451830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 80903165790353175880212263664180727771325732179398509436642998526340398672990 | 211 |
UVM_INFO @ 912592278 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 53452595446467865652541018957971463755720878293727605347151861057807977611017 | 201 |
UVM_INFO @ 246725865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 4011443252607838068096401976042504739807647189920332678679164840399105548922 | 193 |
UVM_INFO @ 242719857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 95491997760431825565102673157741383505271962999641298869949600254382741376944 | 209 |
UVM_INFO @ 126714453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 82911625379897089333412810255035648855224241573819522956516971441497161099911 | 183 |
UVM_INFO @ 939544713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 83957991559480985795927643528750904281384318677346769019216084044758834290852 | 165 |
UVM_INFO @ 260152703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 67310017793664826526070511980420753684156532198996078232051746731201143338295 | 207 |
UVM_INFO @ 2349567982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 21010535453680448922957170033799401734030344797824322005565733159800200635890 | 177 |
UVM_INFO @ 256871481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 24190341638179213222542456083089799895056869813191866659849989256177652335251 | 213 |
UVM_INFO @ 477980126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 23663163934988566299122100179172192758762716299781865109187912084866988151154 | 199 |
UVM_INFO @ 107633983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 88534724039887698008020758020607783825524638418185195210260327059347862569248 | 171 |
UVM_INFO @ 187060677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 82961508663729831079692383508350625866599569739081026267344205255436936904254 | 205 |
UVM_INFO @ 127102847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 108869040758399928431774662730725235617325007542517813258039112700766899873774 | 187 |
UVM_INFO @ 69173761 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 8864581472253164424585231423152216680389594779914708962745523873725665589871 | 169 |
UVM_INFO @ 613821050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 102973466436808471277051624098584626943820721437094796039171413281979537580924 | 207 |
UVM_INFO @ 83498174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_entropy_stress | 363368446143638894828180490666202441845580852053582542036809898382437366459 | 201 |
UVM_INFO @ 1491297796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state | 7 test runs | |||
| alert_handler_ping_timeout | 81796677308704172045133516830027762139582402324246889098461256775144409034807 | 116 |
UVM_INFO @ 33202134627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 101854556795699008122565751407312516871956908628871897724786987140633377902877 | 116 |
UVM_INFO @ 9494481402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 77673166800457328597579080920599254298539289678855593100728847265271303307206 | 119 |
UVM_INFO @ 5337130450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 71663543905292337104758108344621368396268445045248570138427673815941745376562 | 92 |
UVM_INFO @ 1737346996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 28684092748378095614800699020989674733644994838742586937051616905608962695907 | 98 |
UVM_INFO @ 2155639902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 39417022111972935846717713835863562308868611750025169736459369523167003377496 | 104 |
UVM_INFO @ 18598709213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_ping_timeout | 96734503370491160387809527847409442813316735466867787390491782866798570517799 | 101 |
UVM_INFO @ 7426714276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1236) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | 3 test runs | |||
| alert_handler_stress_all_with_rand_reset | 948125543786506915181282019552721217205193573303749898671899284771102871996 | 84 |
UVM_INFO @ 3700327349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 24407233355388310417499205211201306758629589058731873209056911664023056468788 | 106 |
UVM_INFO @ 568366459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| alert_handler_stress_all_with_rand_reset | 98767709484912714413448793553011286177359043350955160505393656540309422830159 | 97 |
UVM_INFO @ 512302076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|