Simulation Results: gpio

 
15/05/2026 15:00:24 DVSim: v1.34.0 sha: 9b0af25 json Branch: reseed_opt Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.37 %
  • code
  • 98.27 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.57 %
  • toggle
  • 93.94 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
45.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.780s 199.153us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.610s 48.941us 10 10 100.00
gpio_smoke_en_cdc_prim 2.170s 502.815us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.770s 757.164us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.960s 43.270us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.990s 38.121us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.080s 509.073us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.160s 49.706us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.300s 29.656us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.990s 38.121us 5 5 100.00
gpio_csr_aliasing 1.160s 49.706us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.250s 30.611us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.670s 210.006us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.370s 77.563us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.630s 709.775us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.110s 158.230us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 3.650s 520.071us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 20.230s 839.296us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.480s 1570.885us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.410s 340.899us 10 10 100.00
stress_all 0 10 0.00
gpio_stress_all 67.730s 3106.224us 0 10 0.00
alert_test 10 10 100.00
gpio_alert_test 0.960s 51.690us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.980s 128.911us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.280s 106.359us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.280s 106.359us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.990s 38.121us 5 5 100.00
gpio_same_csr_outstanding 1.160s 37.560us 5 5 100.00
gpio_csr_aliasing 1.160s 49.706us 1 1 100.00
gpio_csr_hw_reset 0.960s 43.270us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.990s 38.121us 5 5 100.00
gpio_same_csr_outstanding 1.160s 37.560us 5 5 100.00
gpio_csr_aliasing 1.160s 49.706us 1 1 100.00
gpio_csr_hw_reset 0.960s 43.270us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.830s 126.506us 25 25 100.00
gpio_sec_cm 1.390s 93.675us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.830s 126.506us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 9 10 90.00
gpio_rand_straps 0.990s 15.113us 9 10 90.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 13.570s 1784.475us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 11 test runs
gpio_stress_all 82230742696032672516633021129047023170588342687099575734407384185394969546551 167
UVM_INFO @ 290259013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 79665967082442269930741386275090319900367338075312420903580809736193121672487 75
UVM_INFO @ 1265549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 41830550974240090568001668098901567810299450340168181550182511545304016218199 1224
UVM_INFO @ 2921674139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 65726346701747975704052861807765456480253872426345885747340135756746508561322 1460
UVM_INFO @ 3106224451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 21921168499059816198194834196505431449842290617509485424335097374700702518236 847
UVM_INFO @ 987892263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 1355197212170576537056912447081597475643623676512439561364706100003431412550 852
UVM_INFO @ 2162630320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 71606087713784728434830132241512766513108341497513764807841032251173640478896 469
UVM_INFO @ 963848315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 91991028635909928233545226352975625340004439732624105750873226342316800358842 331
UVM_INFO @ 1550871114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 27910521265267151736482123823109634279284633696256174341487315924499962690133 80
UVM_INFO @ 101767255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 19114079483176899524732815872938528624548401714924445176040455933254589807637 719
UVM_INFO @ 1289563055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 42774449485858956816267426117203446374297433470416473872984087324237514099400 434
UVM_INFO @ 1147578533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 7 test runs
gpio_stress_all_with_rand_reset 74701116118954852188748890068783959604721339550026419514410407344096910047361 79
UVM_INFO @ 204978979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 99554643207421618991338342747148274638935968416074734906854284135895857146153 78
UVM_INFO @ 1897034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48223506457996238441572067327576852856943246227984145706516475799052049212617 78
UVM_INFO @ 5125749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 102133357715442734195379626415093855708559205341180976803978131535897436161023 81
UVM_INFO @ 603673717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20244163716063894306505148609055517449628700588438596997662205674316820924071 78
UVM_INFO @ 1987122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 57019236328300892624432261369931177055795309917840739673689241163880203210621 79
UVM_INFO @ 173498298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 60070512948233181644566377410196519299131314415044171309208633147073266619226 80
UVM_INFO @ 966555822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done) 3 test runs
gpio_stress_all_with_rand_reset 26876201264695200964704322776733319728641189788495963834643019075345949644268 295
UVM_INFO @ 128782226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 92466546666611000471727772091214807185838776830262546974657113791804645411173 265
UVM_INFO @ 1784475435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 70504492841276535423508297468670606477504162363214161675954331374847336129426 80
UVM_INFO @ 42542839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---