Simulation Results: entropy_src/rng_4bits

 
20/05/2026 18:33:28 DVSim: v1.41.0 sha: e92b798 json Branch: reseed_opt Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 74.18 %
  • code
  • 87.96 %
  • assert
  • 82.92 %
  • func
  • 51.66 %
  • block
  • 94.43 %
  • line
  • 97.09 %
  • branch
  • 86.58 %
  • toggle
  • 75.47 %
  • FSM
  • 92.71 %
Validation stages
V1
100.00%
V2
93.75%
V2S
85.71%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 25.262us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 1.000s 110.633us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 47.798us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 9.000s 397.014us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 4.000s 119.548us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 130.149us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 47.798us 1 1 100.00
entropy_src_csr_aliasing 4.000s 119.548us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 2.000s 25.262us 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
entropy_src_fw_ov 48.000s 12901.146us 0 1 0.00
firmware_mode 0 1 0.00
entropy_src_fw_ov 48.000s 12901.146us 0 1 0.00
rng_mode 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 191.000s 13032.106us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
entropy_src_intr 10.000s 521.416us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
entropy_src_functional_alerts 6.000s 2394.720us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 247.000s 14077.770us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 139.195us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 4.000s 62.224us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 31.340us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 60.929us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 81.638us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 81.638us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 110.633us 1 1 100.00
entropy_src_csr_rw 2.000s 47.798us 1 1 100.00
entropy_src_csr_aliasing 4.000s 119.548us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 99.412us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 110.633us 1 1 100.00
entropy_src_csr_rw 2.000s 47.798us 1 1 100.00
entropy_src_csr_aliasing 4.000s 119.548us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 99.412us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 94.725us 1 1 100.00
entropy_src_tl_intg_err 3.000s 213.089us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
entropy_src_cfg_regwen 2.000s 105.338us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
entropy_src_fw_ov 48.000s 12901.146us 0 1 0.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 139.195us 1 1 100.00
entropy_src_sec_cm 3.000s 94.725us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 139.195us 1 1 100.00
entropy_src_sec_cm 3.000s 94.725us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 27.000s 13177.014us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 139.195us 1 1 100.00
entropy_src_sec_cm 3.000s 94.725us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 139.195us 1 1 100.00
entropy_src_sec_cm 3.000s 94.725us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 139.195us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 6.000s 2394.720us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 213.089us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 112.000s 13169.254us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:354) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:* 1 test run
entropy_src_fw_ov 23799492201779620524406370297970288863759691955534869123822727678232072197235 1075
UVM_INFO @ 12901145627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---