Simulation Results: gpio

 
20/05/2026 18:33:28 DVSim: v1.41.0 sha: e92b798 json Branch: reseed_opt Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.56 %
  • code
  • 95.86 %
  • assert
  • 96.84 %
  • func
  • 99.99 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 97.26 %
  • toggle
  • 88.22 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.690s 49.742us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.430s 733.990us 1 1 100.00
gpio_smoke_en_cdc_prim 1.490s 85.225us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.730s 42.473us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.000s 167.283us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.980s 43.619us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.530s 221.732us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.230s 31.877us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.990s 45.706us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.980s 43.619us 1 1 100.00
gpio_csr_aliasing 1.230s 31.877us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.690s 60.995us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.160s 96.597us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.380s 62.987us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.250s 60.245us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.570s 291.979us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 1.600s 27.459us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 21.490s 1733.961us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 2.780s 95.955us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.370s 119.487us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 0.990s 68.845us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.900s 14.214us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.880s 34.003us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.280s 200.098us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.280s 200.098us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.980s 43.619us 1 1 100.00
gpio_same_csr_outstanding 0.980s 22.928us 1 1 100.00
gpio_csr_aliasing 1.230s 31.877us 1 1 100.00
gpio_csr_hw_reset 1.000s 167.283us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.980s 43.619us 1 1 100.00
gpio_same_csr_outstanding 0.980s 22.928us 1 1 100.00
gpio_csr_aliasing 1.230s 31.877us 1 1 100.00
gpio_csr_hw_reset 1.000s 167.283us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.480s 518.192us 1 1 100.00
gpio_sec_cm 1.250s 148.347us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.480s 518.192us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.850s 5.063us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 6.000s 431.000us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 2 test runs
gpio_stress_all 65247908784986949601129371395665460120013233971772804889557729528959659166344 77
UVM_INFO @ 68845101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 98914025219115093283000172973231503992708689809680387425638120384620875167143 75
UVM_INFO @ 5063266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 104717743733872585208497986571203748707360068410052103950229636836193293286016 119
UVM_INFO @ 431000223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---