Simulation Results: kmac/unmasked

 
20/05/2026 18:33:28 DVSim: v1.41.0 sha: e92b798 json Branch: reseed_opt Tool: vcs [unknown]
Coverage statistics
  • Total
  • 92.34 %
  • code
  • 89.00 %
  • assert
  • 95.95 %
  • func
  • 92.06 %
  • line
  • 97.27 %
  • branch
  • 95.44 %
  • cond
  • 93.71 %
  • toggle
  • 99.92 %
  • FSM
  • 58.68 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 22.150s 845.374us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.450s 24.346us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.460s 27.620us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 9.380s 604.558us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.910s 307.243us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.260s 51.660us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.460s 27.620us 1 1 100.00
kmac_csr_aliasing 4.910s 307.243us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.050s 39.042us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.640s 65.504us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1668.670s 49315.587us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 587.970s 7434.570us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 33.600s 2566.508us 1 1 100.00
kmac_test_vectors_sha3_256 31.760s 2390.527us 1 1 100.00
kmac_test_vectors_sha3_384 1319.610s 139199.166us 1 1 100.00
kmac_test_vectors_sha3_512 14.870s 276.737us 1 1 100.00
kmac_test_vectors_shake_128 163.130s 50238.404us 1 1 100.00
kmac_test_vectors_shake_256 1842.470s 61668.795us 1 1 100.00
kmac_test_vectors_kmac 2.210s 447.342us 1 1 100.00
kmac_test_vectors_kmac_xof 3.350s 369.937us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 458.760s 135089.433us 1 1 100.00
app 1 1 100.00
kmac_app 166.280s 7181.780us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 220.960s 60552.667us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 174.730s 12417.337us 1 1 100.00
error 1 1 100.00
kmac_error 42.260s 2199.245us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 2.410s 677.242us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 3.330s 108.778us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 29.740s 3600.509us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 12.380s 791.197us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 35.680s 5971.122us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.730s 93.107us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 905.510s 124876.679us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 1.010s 12.904us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.230s 174.638us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.320s 34.703us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.320s 34.703us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.450s 24.346us 1 1 100.00
kmac_csr_rw 1.460s 27.620us 1 1 100.00
kmac_csr_aliasing 4.910s 307.243us 1 1 100.00
kmac_same_csr_outstanding 2.130s 100.655us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.450s 24.346us 1 1 100.00
kmac_csr_rw 1.460s 27.620us 1 1 100.00
kmac_csr_aliasing 4.910s 307.243us 1 1 100.00
kmac_same_csr_outstanding 2.130s 100.655us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.670s 80.271us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.670s 80.271us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.670s 80.271us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.670s 80.271us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.830s 159.299us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 30.210s 9361.481us 1 1 100.00
kmac_tl_intg_err 3.470s 123.760us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.470s 123.760us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.730s 93.107us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 22.150s 845.374us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 458.760s 135089.433us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.670s 80.271us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 30.210s 9361.481us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 30.210s 9361.481us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 30.210s 9361.481us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 22.150s 845.374us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.730s 93.107us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 30.210s 9361.481us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 237.240s 20117.421us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 22.150s 845.374us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 58.430s 16317.061us 1 1 100.00