Simulation Results: otbn

 
20/05/2026 18:33:28 DVSim: v1.41.0 sha: e92b798 json Branch: reseed_opt Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 93.91 %
  • code
  • 94.27 %
  • assert
  • 90.01 %
  • func
  • 97.46 %
  • block
  • 99.35 %
  • line
  • 99.51 %
  • branch
  • 91.81 %
  • toggle
  • 88.18 %
  • FSM
  • 97.56 %
Validation stages
V1
100.00%
V2
100.00%
V2S
92.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 12.000s 135.805us 1 1 100.00
single_binary 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 25.000s 18.578us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 24.000s 26.770us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 29.000s 188.049us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 25.000s 12.975us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 28.000s 333.424us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 24.000s 26.770us 1 1 100.00
otbn_csr_aliasing 25.000s 12.975us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 62.000s 1008.507us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 70.000s 2656.365us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 120.000s 478.541us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 86.000s 313.809us 1 1 100.00
back_to_back 1 1 100.00
otbn_multi 93.000s 252.923us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 27.000s 233.719us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 27.000s 28.837us 1 1 100.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 6.000s 48.907us 1 1 100.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 10.000s 72.936us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 26.000s 47.994us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 11.000s 16.228us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 8.000s 103.479us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 8.000s 103.479us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 25.000s 18.578us 1 1 100.00
otbn_csr_rw 24.000s 26.770us 1 1 100.00
otbn_csr_aliasing 25.000s 12.975us 1 1 100.00
otbn_same_csr_outstanding 7.000s 31.895us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 25.000s 18.578us 1 1 100.00
otbn_csr_rw 24.000s 26.770us 1 1 100.00
otbn_csr_aliasing 25.000s 12.975us 1 1 100.00
otbn_same_csr_outstanding 7.000s 31.895us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 25.000s 45.566us 1 1 100.00
otbn_dmem_err 35.000s 93.368us 1 1 100.00
internal_integrity 4 4 100.00
otbn_alu_bignum_mod_err 28.000s 19.048us 1 1 100.00
otbn_controller_ispr_rdata_err 27.000s 110.701us 1 1 100.00
otbn_mac_bignum_acc_err 20.000s 74.542us 1 1 100.00
otbn_urnd_err 9.000s 19.536us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 24.000s 56.334us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 7.000s 47.344us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 9.000s 251.804us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
otbn_tl_intg_err 15.000s 241.097us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 56.000s 821.082us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 12.000s 135.805us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 35.000s 93.368us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 25.000s 45.566us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 15.000s 241.097us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 27.000s 28.837us 1 1 100.00
sec_cm_controller_fsm_local_esc 5 5 100.00
otbn_imem_err 25.000s 45.566us 1 1 100.00
otbn_dmem_err 35.000s 93.368us 1 1 100.00
otbn_zero_state_err_urnd 6.000s 48.907us 1 1 100.00
otbn_illegal_mem_acc 24.000s 56.334us 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 25.000s 45.566us 1 1 100.00
otbn_dmem_err 35.000s 93.368us 1 1 100.00
otbn_zero_state_err_urnd 6.000s 48.907us 1 1 100.00
otbn_illegal_mem_acc 24.000s 56.334us 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 27.000s 28.837us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 25.000s 45.566us 1 1 100.00
otbn_dmem_err 35.000s 93.368us 1 1 100.00
otbn_zero_state_err_urnd 6.000s 48.907us 1 1 100.00
otbn_illegal_mem_acc 24.000s 56.334us 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 24.000s 64.101us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 8.000s 29.624us 1 1 100.00
sec_cm_rnd_bus_consistency 0 1 0.00
otbn_rnd_sec_cm 22.000s 623.397us 0 1 0.00
sec_cm_rnd_rng_digest 0 1 0.00
otbn_rnd_sec_cm 22.000s 623.397us 0 1 0.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 11.000s 34.072us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 11.000s 206.373us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
sec_cm_loop_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 8.000s 44.191us 0 1 0.00
sec_cm_call_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 8.000s 44.191us 0 1 0.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 5.000s 27.855us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 93.000s 252.923us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 10.000s 88.302us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 7.000s 119.003us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 190.000s 2625.757us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
otbn_stress_all_with_rand_reset 291.000s 1803.392us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
otbn_smoke_vectorized 11.000s 549.256us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (otbn_scoreboard.sv:550) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived. 1 test run
otbn_rnd_sec_cm 14319381684589734371848119447722111083917374529149159755349840128511886279459 125
UVM_INFO @ 623396772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/reseed_opt/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed 1 test run
otbn_stack_addr_integ_chk 103685590373740672421181325064178327825358546204883571127109451761002352811682 114
UVM_ERROR @ 44191497 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 44191497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---