Simulation Results: spi_device/2p

 
21/05/2026 15:00:32 DVSim: v1.38.0 sha: e92b798 json Branch: reseed_opt Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.97 %
  • code
  • 94.21 %
  • assert
  • 94.74 %
  • func
  • 98.96 %
  • line
  • 98.95 %
  • branch
  • 98.37 %
  • cond
  • 96.63 %
  • toggle
  • 87.74 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
93.33%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 25 25 100.00
spi_device_flash_and_tpm 461.410s 64171.845us 25 25 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 1.350s 72.383us 1 1 100.00
csr_rw 5 5 100.00
spi_device_csr_rw 2.660s 185.763us 5 5 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 26.080s 1109.813us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 9.740s 2994.308us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
spi_device_csr_mem_rw_with_rand_reset 4.710s 151.411us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
spi_device_csr_rw 2.660s 185.763us 5 5 100.00
spi_device_csr_aliasing 9.740s 2994.308us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 1.060s 15.487us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.810s 125.465us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 15 15 100.00
spi_device_csb_read 1.180s 65.365us 15 15 100.00
mem_parity 20 20 100.00
spi_device_mem_parity 1.480s 58.920us 20 20 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 1.130s 25.733us 1 1 100.00
tpm_read 15 15 100.00
spi_device_tpm_rw 5.280s 137.333us 15 15 100.00
tpm_write 15 15 100.00
spi_device_tpm_rw 5.280s 137.333us 15 15 100.00
tpm_hw_reg 30 30 100.00
spi_device_tpm_read_hw_reg 18.530s 27954.653us 15 15 100.00
spi_device_tpm_sts_read 1.470s 402.742us 15 15 100.00
tpm_fully_random_case 15 15 100.00
spi_device_tpm_all 33.920s 17399.290us 15 15 100.00
pass_cmd_filtering 40 40 100.00
spi_device_pass_cmd_filtering 26.440s 50723.832us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
pass_addr_translation 40 40 100.00
spi_device_pass_addr_payload_swap 26.050s 45733.860us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
pass_payload_translation 40 40 100.00
spi_device_pass_addr_payload_swap 26.050s 45733.860us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
cmd_info_slots 25 25 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
cmd_read_status 40 40 100.00
spi_device_intercept 28.610s 5239.244us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
cmd_read_jedec 40 40 100.00
spi_device_intercept 28.610s 5239.244us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
cmd_read_sfdp 40 40 100.00
spi_device_intercept 28.610s 5239.244us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
cmd_fast_read 40 40 100.00
spi_device_intercept 28.610s 5239.244us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
cmd_read_pipeline 40 40 100.00
spi_device_intercept 28.610s 5239.244us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
flash_cmd_upload 15 15 100.00
spi_device_upload 24.760s 35571.736us 15 15 100.00
mailbox_command 15 15 100.00
spi_device_mailbox 27.090s 5475.656us 15 15 100.00
mailbox_cross_outside_command 15 15 100.00
spi_device_mailbox 27.090s 5475.656us 15 15 100.00
mailbox_cross_inside_command 15 15 100.00
spi_device_mailbox 27.090s 5475.656us 15 15 100.00
cmd_read_buffer 30 30 100.00
spi_device_flash_mode 66.840s 7618.413us 15 15 100.00
spi_device_read_buffer_direct 18.460s 2900.837us 15 15 100.00
cmd_dummy_cycle 40 40 100.00
spi_device_mailbox 27.090s 5475.656us 15 15 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
quad_spi 25 25 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
dual_spi 25 25 100.00
spi_device_flash_all 264.070s 376514.720us 25 25 100.00
4b_3b_feature 15 15 100.00
spi_device_cfg_cmd 16.590s 1813.913us 15 15 100.00
write_enable_disable 15 15 100.00
spi_device_cfg_cmd 16.590s 1813.913us 15 15 100.00
TPM_with_flash_or_passthrough_mode 25 25 100.00
spi_device_flash_and_tpm 461.410s 64171.845us 25 25 100.00
tpm_and_flash_trans_with_min_inactive_time 25 25 100.00
spi_device_flash_and_tpm_min_idle 496.400s 297777.079us 25 25 100.00
stress_all 15 15 100.00
spi_device_stress_all 978.900s 362640.607us 15 15 100.00
alert_test 10 10 100.00
spi_device_alert_test 1.150s 16.460us 10 10 100.00
intr_test 10 10 100.00
spi_device_intr_test 1.150s 32.582us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
spi_device_tl_errors 5.930s 2328.912us 25 25 100.00
tl_d_illegal_access 25 25 100.00
spi_device_tl_errors 5.930s 2328.912us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
spi_device_csr_hw_reset 1.350s 72.383us 1 1 100.00
spi_device_csr_rw 2.660s 185.763us 5 5 100.00
spi_device_csr_aliasing 9.740s 2994.308us 1 1 100.00
spi_device_same_csr_outstanding 4.990s 155.147us 5 5 100.00
tl_d_partial_access 12 12 100.00
spi_device_csr_hw_reset 1.350s 72.383us 1 1 100.00
spi_device_csr_rw 2.660s 185.763us 5 5 100.00
spi_device_csr_aliasing 9.740s 2994.308us 1 1 100.00
spi_device_same_csr_outstanding 4.990s 155.147us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
spi_device_sec_cm 1.600s 81.650us 5 5 100.00
spi_device_tl_intg_err 30.550s 4266.869us 25 25 100.00
sec_cm_bus_integrity 25 25 100.00
spi_device_tl_intg_err 30.550s 4266.869us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 14 15 93.33
spi_device_flash_mode_ignore_cmds 158.240s 23389.140us 14 15 93.33

Error Messages

   Test seed line log context
UVM_ERROR (spi_device_scoreboard.sv:2512) [scoreboard] Check failed item.d_data == `gmv(csr) (* [*] vs * [*]) CSR last_read_addr compare mismatch act * != exp * 1 test run
spi_device_flash_mode_ignore_cmds 58323121957237628340394987024142109481146650466204899519229194367980809335051 105
UVM_INFO @ 7529662194 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 5/14
UVM_INFO @ 7529662194 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 6/14
UVM_INFO @ 9020892469 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 6/14
UVM_INFO @ 9020892469 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_mode_ignore_cmds_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 7/14