Simulation Results: gpio

 
24/05/2026 04:19:36 DVSim: v1.49.0 sha: 32edacb json Branch: reseed_opt Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.34 %
  • code
  • 98.19 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 99.42 %
  • toggle
  • 93.77 %
Validation stages
V1
100.00%
V2
93.63%
V2S
100.00%
V3
35.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 40 40 100.00
gpio_smoke 1.590s 382.827us 10 10 100.00
gpio_smoke_no_pullup_pulldown 1.630s 177.550us 10 10 100.00
gpio_smoke_en_cdc_prim 1.570s 633.384us 10 10 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.440s 121.598us 10 10 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.050s 19.112us 1 1 100.00
csr_rw 5 5 100.00
gpio_csr_rw 0.980s 21.493us 5 5 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.370s 337.978us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.270s 89.129us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
gpio_csr_mem_rw_with_rand_reset 1.830s 31.576us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
gpio_csr_rw 0.980s 21.493us 5 5 100.00
gpio_csr_aliasing 1.270s 89.129us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 20 20 100.00
gpio_random_dout_din 1.450s 49.937us 10 10 100.00
gpio_random_dout_din_no_pullup_pulldown 1.570s 201.235us 10 10 100.00
out_in_regs_read_write 10 10 100.00
gpio_dout_din_regs_random_rw 1.190s 26.028us 10 10 100.00
gpio_interrupt_programming 10 10 100.00
gpio_intr_rand_pgm 1.870s 201.023us 10 10 100.00
random_interrupt_trigger 10 10 100.00
gpio_rand_intr_trigger 3.160s 389.403us 10 10 100.00
interrupt_and_noise_filter 10 10 100.00
gpio_intr_with_filter_rand_intr_event 4.370s 88.314us 10 10 100.00
noise_filter_stress 10 10 100.00
gpio_filter_stress 29.500s 2700.747us 10 10 100.00
regs_long_reads_and_writes 10 10 100.00
gpio_random_long_reg_writes_reg_reads 5.010s 295.746us 10 10 100.00
full_random 10 10 100.00
gpio_full_random 1.300s 49.523us 10 10 100.00
stress_all 0 10 0.00
gpio_stress_all 81.810s 20527.403us 0 10 0.00
alert_test 10 10 100.00
gpio_alert_test 0.930s 37.180us 10 10 100.00
intr_test 10 10 100.00
gpio_intr_test 0.970s 93.800us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
gpio_tl_errors 3.130s 147.603us 25 25 100.00
tl_d_illegal_access 25 25 100.00
gpio_tl_errors 3.130s 147.603us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
gpio_csr_rw 0.980s 21.493us 5 5 100.00
gpio_same_csr_outstanding 1.150s 27.032us 5 5 100.00
gpio_csr_aliasing 1.270s 89.129us 1 1 100.00
gpio_csr_hw_reset 1.050s 19.112us 1 1 100.00
tl_d_partial_access 12 12 100.00
gpio_csr_rw 0.980s 21.493us 5 5 100.00
gpio_same_csr_outstanding 1.150s 27.032us 5 5 100.00
gpio_csr_aliasing 1.270s 89.129us 1 1 100.00
gpio_csr_hw_reset 1.050s 19.112us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 30 30 100.00
gpio_tl_intg_err 1.750s 258.073us 25 25 100.00
gpio_sec_cm 1.330s 353.517us 5 5 100.00
sec_cm_bus_integrity 25 25 100.00
gpio_tl_intg_err 1.750s 258.073us 25 25 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 7 10 70.00
gpio_rand_straps 0.950s 1.004us 7 10 70.00
stress_all_with_rand_reset 0 10 0.00
gpio_stress_all_with_rand_reset 13.050s 7267.443us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 13 test runs
gpio_stress_all 14695091033870162325826816607507574630531430385914769908837420012569875491435 1319
UVM_INFO @ 31603004932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 113901524087406947814877905040674378805881634540132630402155219003597991417541 1414
UVM_INFO @ 20527403481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 63318032596962896050182018246138945897687259876736503752611270742297056590621 75
UVM_INFO @ 1003889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 115535591614367385352589418416075669355196742117358713580339786522188876864160 1035
UVM_INFO @ 11506997044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 16395460130439229003592472415189830979622592118648841808356701005684237247071 842
UVM_INFO @ 1423104006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 68819749102921113762343770028699782731112494742258501308520535836660106294509 75
UVM_INFO @ 1595915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 109433813776290467086227963239068328580236671934931666228763523323573486258368 236
UVM_INFO @ 959428861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 41345923086420700254535080782370476810653020035238863373882500288964006769367 453
UVM_INFO @ 3997219131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 106010306401917707501388995124811782464234812867101702908437489917350328204583 75
UVM_INFO @ 2259989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 38968463646072371484380225174965982625033153033600763521600854226843829940493 1590
UVM_INFO @ 6750365354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 39553325143216069178080784050185807927240314704983317378371749613380026279531 79
UVM_INFO @ 154012258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 22397368025617436896197963880607112166997016247612268583161130096743401387749 1834
UVM_INFO @ 47015379171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all 15117298267333599485812896421420192294247991188265794807124397398466540093623 562
UVM_INFO @ 1752010992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done) 8 test runs
gpio_stress_all_with_rand_reset 18390066546697359453011878235509555130107434247355256454078243759502283814496 80
UVM_INFO @ 10686359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 15797337679981121169175063403921718658630500393225854447228566921107808733565 123
UVM_INFO @ 589343204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7278368942923175539156303644602882494940485095484215547729856815206552218646 80
UVM_INFO @ 19889716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 113502477890177980755917787668344545711292679367486643601939503606549453743971 360
UVM_INFO @ 3931879664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87824458942572057306045287393051303880754781864510180608383348316147016482782 80
UVM_INFO @ 12300126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33668596676808312899512565575259024231149440360549277257127664717663033583558 80
UVM_INFO @ 2112359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 88125651881052453771763413121859000825435220033421393063627016384740794024026 91
UVM_INFO @ 36602599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 17239155850466955375312728644151123827673433578604334183775972384285997909018 80
UVM_INFO @ 15701798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 2 test runs
gpio_stress_all_with_rand_reset 9919338025231621355914961293796993485176982079718307775969270519333204820075 79
UVM_INFO @ 175024113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 10921735006650404673945809443933233563338421027036196095910909162961470156922 411
UVM_INFO @ 7267442828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---