Simulation Results: pwrmgr

 
24/05/2026 04:19:36 DVSim: v1.49.0 sha: 32edacb json Branch: reseed_opt Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.29 %
  • code
  • 94.66 %
  • assert
  • 96.34 %
  • func
  • 97.86 %
  • line
  • 98.92 %
  • branch
  • 95.61 %
  • cond
  • 94.77 %
  • toggle
  • 90.02 %
  • FSM
  • 94.00 %
Validation stages
V1
100.00%
V2
93.43%
V2S
71.43%
V3
60.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 10 10 100.00
pwrmgr_smoke 1.000s 31.603us 10 10 100.00
csr_hw_reset 1 1 100.00
pwrmgr_csr_hw_reset 1.010s 53.498us 1 1 100.00
csr_rw 5 5 100.00
pwrmgr_csr_rw 1.030s 19.745us 5 5 100.00
csr_bit_bash 1 1 100.00
pwrmgr_csr_bit_bash 3.190s 1045.525us 1 1 100.00
csr_aliasing 1 1 100.00
pwrmgr_csr_aliasing 1.520s 180.301us 1 1 100.00
csr_mem_rw_with_rand_reset 5 5 100.00
pwrmgr_csr_mem_rw_with_rand_reset 1.360s 47.148us 5 5 100.00
regwen_csr_and_corresponding_lockable_csr 6 6 100.00
pwrmgr_csr_rw 1.030s 19.745us 5 5 100.00
pwrmgr_csr_aliasing 1.520s 180.301us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
wakeup 10 10 100.00
pwrmgr_wakeup 1.220s 79.308us 10 10 100.00
control_clks 10 10 100.00
pwrmgr_wakeup 1.220s 79.308us 10 10 100.00
aborted_low_power 20 20 100.00
pwrmgr_aborted_low_power 1.320s 30.350us 10 10 100.00
pwrmgr_lowpower_invalid 1.120s 48.557us 10 10 100.00
reset 15 20 75.00
pwrmgr_reset 2.490s 1000.000us 8 10 80.00
pwrmgr_reset_invalid 1.170s 172.880us 7 10 70.00
main_power_glitch_reset 8 10 80.00
pwrmgr_reset 2.490s 1000.000us 8 10 80.00
reset_wakeup_race 10 10 100.00
pwrmgr_wakeup_reset 1.990s 293.098us 10 10 100.00
lowpower_wakeup_race 10 10 100.00
pwrmgr_lowpower_wakeup_race 1.400s 282.468us 10 10 100.00
disable_rom_integrity_check 7 10 70.00
pwrmgr_disable_rom_integrity_check 2.840s 1000.000us 7 10 70.00
stress_all 9 10 90.00
pwrmgr_stress_all 36.440s 11161.626us 9 10 90.00
intr_test 10 10 100.00
pwrmgr_intr_test 1.000s 27.401us 10 10 100.00
tl_d_oob_addr_access 25 25 100.00
pwrmgr_tl_errors 3.010s 114.208us 25 25 100.00
tl_d_illegal_access 25 25 100.00
pwrmgr_tl_errors 3.010s 114.208us 25 25 100.00
tl_d_outstanding_access 12 12 100.00
pwrmgr_csr_hw_reset 1.010s 53.498us 1 1 100.00
pwrmgr_csr_rw 1.030s 19.745us 5 5 100.00
pwrmgr_csr_aliasing 1.520s 180.301us 1 1 100.00
pwrmgr_same_csr_outstanding 1.050s 126.755us 5 5 100.00
tl_d_partial_access 12 12 100.00
pwrmgr_csr_hw_reset 1.010s 53.498us 1 1 100.00
pwrmgr_csr_rw 1.030s 19.745us 5 5 100.00
pwrmgr_csr_aliasing 1.520s 180.301us 1 1 100.00
pwrmgr_same_csr_outstanding 1.050s 126.755us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 0 30 0.00
pwrmgr_tl_intg_err 1.010s 8.242us 0 25 0.00
pwrmgr_sec_cm 1.220s 29.154us 0 5 0.00
prim_count_check 0 5 0.00
pwrmgr_sec_cm 1.220s 29.154us 0 5 0.00
prim_fsm_check 0 5 0.00
pwrmgr_sec_cm 1.220s 29.154us 0 5 0.00
sec_cm_bus_integrity 0 25 0.00
pwrmgr_tl_intg_err 1.010s 8.242us 0 25 0.00
sec_cm_lc_ctrl_intersig_mubi 10 10 100.00
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 2.820s 855.884us 10 10 100.00
sec_cm_rom_ctrl_intersig_mubi 10 10 100.00
pwrmgr_wakeup_reset 1.990s 293.098us 10 10 100.00
sec_cm_rstmgr_intersig_mubi 10 10 100.00
pwrmgr_sec_cm_rstmgr_intersig_mubi 1.350s 69.381us 10 10 100.00
sec_cm_esc_rx_clk_bkgn_chk 10 10 100.00
pwrmgr_esc_clk_rst_malfunc 1.020s 30.510us 10 10 100.00
sec_cm_esc_rx_clk_local_esc 0 5 0.00
pwrmgr_sec_cm 1.220s 29.154us 0 5 0.00
sec_cm_fsm_sparse 0 5 0.00
pwrmgr_sec_cm 1.220s 29.154us 0 5 0.00
sec_cm_fsm_terminal 0 5 0.00
pwrmgr_sec_cm 1.220s 29.154us 0 5 0.00
sec_cm_ctrl_flow_global_esc 10 10 100.00
pwrmgr_global_esc 1.020s 36.288us 10 10 100.00
sec_cm_main_pd_rst_local_esc 10 10 100.00
pwrmgr_glitch 1.010s 52.392us 10 10 100.00
sec_cm_ctrl_config_regwen 10 10 100.00
pwrmgr_sec_cm_ctrl_config_regwen 1.720s 250.308us 10 10 100.00
sec_cm_wakeup_config_regwen 5 5 100.00
pwrmgr_csr_rw 1.030s 19.745us 5 5 100.00
sec_cm_reset_config_regwen 5 5 100.00
pwrmgr_csr_rw 1.030s 19.745us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
escalation_timeout 3 10 30.00
pwrmgr_escalation_timeout 1.280s 405.802us 3 10 30.00
stress_all_with_rand_reset 9 10 90.00
pwrmgr_stress_all_with_rand_reset 15.220s 5003.508us 9 10 90.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [pwrmgr_common_vseq] expect alert:fatal_fault to fire 30 test runs
pwrmgr_tl_intg_err 25257936118192116626647394950844070157414125063214848232500422986703961397002 85
UVM_INFO @ 8355311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 7201721182972613003756748290250862476836683764921769087474557945124658712021 86
UVM_INFO @ 29154158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 86502020304561656126168094723722611646763194631384736253657730975832540770384 85
UVM_INFO @ 12188163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 91912176668431911289292425618091463463016537229145285600420211861729979543632 84
UVM_INFO @ 33050163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 4118410288322090103788722494820067375179295998854166745275683761215678011394 82
UVM_INFO @ 8137858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 87427948670188045496612538047291240208398007097995682690607062593372554024298 86
UVM_INFO @ 29970908 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 40328728169156798397638786204979622320093845438438160242289218931759741107153 78
UVM_INFO @ 8437031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 75196035775197593191309183097718978071349304169022296377012943874070128042691 77
UVM_INFO @ 11212821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 46956151950707442241792933847498413903705183277406144956217510886452387186222 82
UVM_INFO @ 9298964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 45414743468237506297746155286032616359415805418619999751453340941198151973999 80
UVM_INFO @ 23481248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 60320485941295510074363599547047509055296251193146884244196021914172341765148 85
UVM_INFO @ 13402886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 10501332958920720605564465086685716914580476886581801554760726301289998128908 78
UVM_INFO @ 7987611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 38690951533887130326722757772607309949627858525257857745557838700857790817680 85
UVM_INFO @ 10031056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 61687054865850961413975209449365325634565195593864132834941041260288267721023 78
UVM_INFO @ 15458221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 15095835078453014576873925111617321298492389835121635133405808639816890458510 85
UVM_INFO @ 7582702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 15769960054569141348402094424976315162934214684376703865451328561187317053843 85
UVM_INFO @ 9051520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 106321730513154783491930293188887552310652292988640664052431013555197643524827 85
UVM_INFO @ 8241646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 89642776934459379245947453587863136322480063638245623598606214650141803548179 85
UVM_INFO @ 14725442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 77753116091899151593117868985019746457120191804967392925489333601645514786342 78
UVM_INFO @ 10932176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 31187930406521585364497858187743983165998555442867360828442816141041543590679 85
UVM_INFO @ 8779270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 39583577490840692691452636484792085853584890576516551565791578593012871331921 85
UVM_INFO @ 8521052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 32475907721756708549553093090668430330858964093977738331804294698899490379079 85
UVM_INFO @ 16909332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 54257808668260182633334221445951570443532106078162646078162957861368114360762 82
UVM_INFO @ 7403767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 61006376677335319881844522387997437236956155892988769490913000524218942744851 78
UVM_INFO @ 10666104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 47950030765594023422300653544022334260516260297122203329655412274574348358803 78
UVM_INFO @ 10142038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 57449131457155238071199984834464640717241263338529115412579633139606510397037 82
UVM_INFO @ 41857390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 106359332263355193900688104699104549813566098655186254693890143565828946974425 82
UVM_INFO @ 22590099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 112589747183711651347683532035113453317030557842308121507379637090527754365464 85
UVM_INFO @ 6892923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 11689235521107481628128795351429993086243382204671682914883198283507294812111 82
UVM_INFO @ 30921428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 32233746791081481182482189897978646576347694503705066085005991751125466404695 85
UVM_INFO @ 16244137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!clk_en) || status)' 7 test runs
pwrmgr_escalation_timeout 75553495854829670078078510478407474691862705723110533198812397252813155378553 79
UVM_ERROR @ 190446105 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 190446105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 96181681105984513978279850980326675689163208020907076660801083755877505190137 79
UVM_ERROR @ 405801856 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 405801856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 43040160609337211022260360523563992997731740563255230367852912801631681531047 79
UVM_ERROR @ 110027391 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 110027391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 12574681299807088493769777047621423279239116424104383532403811014548090050973 79
UVM_ERROR @ 100836184 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 100836184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 16469776580617074989654428522094431836480257030788936572979587934531201823937 79
UVM_ERROR @ 876240645 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 876240645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 13399662191240068762609888235188611083623654206658555300110322917608646445195 79
UVM_ERROR @ 383763321 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 383763321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_escalation_timeout 62365768680630335454979958425045137802078812543058133799959618862165927176287 79
UVM_ERROR @ 97769305 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 97769305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 5 test runs
pwrmgr_disable_rom_integrity_check 75266429257533735913808430136130100911254521193283102037518839953941285718891 83
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 45127101395728367914768059286817422498212184992954930389037644243728575957553 98
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 16947216133320366569642925041643825498404119000836593069035864111835315856239 142
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_disable_rom_integrity_check 34762554506608722890066096523864237856006839577072959368905535797875867659370 76
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_reset 104065044075876523759955822992510177148843971993479005120540796488897498672053 116
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitStrap 1 test run
pwrmgr_reset_invalid 62860520759392776330778799458324507218015578103850489962660917753838077274718 96
UVM_INFO @ 231102693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_vseq.sv:62) [pwrmgr_reset_vseq] wait timeout occurred! 1 test run
pwrmgr_stress_all 51851852772740374218845621596672837050313153648095218344392735076947681803013 1273
UVM_INFO @ 11161626330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:454) [pwrmgr_common_vseq] wait timeout occurred! 1 test run
pwrmgr_stress_all_with_rand_reset 23445112213115454245678328782335740598546110745820494547968417092055176241519 1038
UVM_INFO @ 10501099744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitReleaseLcRst 1 test run
pwrmgr_reset_invalid 42352367347714187563044105423586169776371900194882660099696599756306016905888 103
UVM_INFO @ 64482121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_invalid_vseq.sv:55) [pwrmgr_reset_invalid_vseq] Timed out waiting for state DVWaitOtpInit 1 test run
pwrmgr_reset_invalid 83678793167628143092400623788232407818249595793254209424468315754774324867622 172
UVM_INFO @ 75940718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---