Simulation Results

Simulation Results: spi_device/1r1w

12/03/2026 16:05:50 DVSim: v1.14.2 sha: ee1b0f6 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
82.28 %

code
92.96 %

assert
94.64 %

func
59.23 %

line
98.99 %

branch
98.20 %

cond
95.25 %

toggle
83.01 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		94.23%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	136.600s	0.000us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	0.820s	0.000us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.560s	0.000us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	8.410s	0.000us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	15.510s	0.000us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	2.850s	0.000us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.560s	0.000us	1	1	100.00
	spi_device_csr_aliasing	15.510s	0.000us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.820s	0.000us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	2.040s	0.000us	1	1	100.00

49/52 passed

94.23 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.940s	0.000us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.990s	0.000us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.950s	0.000us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	2.290s	0.000us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	2.290s	0.000us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	13.150s	0.000us	1	1	100.00
	spi_device_tpm_sts_read	1.010s	0.000us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	13.800s	0.000us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	2.970s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	3.090s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	3.090s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	4.100s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	4.100s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	4.100s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	4.100s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	4.100s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	25.110s	0.000us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	10.900s	0.000us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	10.900s	0.000us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	10.900s	0.000us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	8.020s	0.000us	1	1	100.00
	spi_device_read_buffer_direct	3.680s	0.000us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	10.900s	0.000us	1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	7.770s	0.000us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	2.840s	0.000us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	2.840s	0.000us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	136.600s	0.000us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	37.680s	0.000us	1	1	100.00
stress_all				0	1	0.00
	spi_device_stress_all	197.680s	0.000us	0	1	0.00
alert_test				1	1	100.00
	spi_device_alert_test	0.900s	0.000us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.840s	0.000us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	2.480s	0.000us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	2.480s	0.000us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	0.820s	0.000us	1	1	100.00
	spi_device_csr_rw	1.560s	0.000us	1	1	100.00
	spi_device_csr_aliasing	15.510s	0.000us	1	1	100.00
	spi_device_same_csr_outstanding	2.910s	0.000us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	0.820s	0.000us	1	1	100.00
	spi_device_csr_rw	1.560s	0.000us	1	1	100.00
	spi_device_csr_aliasing	15.510s	0.000us	1	1	100.00
	spi_device_same_csr_outstanding	2.910s	0.000us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	4.720s	0.000us	1	1	100.00
	spi_device_sec_cm	1.100s	0.000us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	4.720s	0.000us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	214.040s	0.000us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	55913071566211560660134852258160366659284586100138488802171021527113742352490	76	UVM_ERROR @ 2179577 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[56]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 2179577 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 2179577 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[952]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	5803733406625321555333342457633304915998322290191694465778759885610893710967	76	UVM_ERROR @ 1852675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x325b39 [1100100101101100111001] vs 0x0 [0]) UVM_ERROR @ 1876675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd13346 [110100010011001101000110] vs 0x0 [0]) UVM_ERROR @ 1916675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x755a91 [11101010101101010010001] vs 0x0 [0]) UVM_ERROR @ 1961675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x415d74 [10000010101110101110100] vs 0x0 [0]) UVM_ERROR @ 2042675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x966d7d [100101100110110101111101] vs 0x0 [0])
UVM_ERROR (spi_device_scoreboard.sv:2512) [scoreboard] Check failed item.d_data == `gmv(csr) (* [] vs []) CSR last_read_addr compare mismatch act != exp *
	spi_device_stress_all	52683104228403655935670049016238394313814546738191863516591555878428919190034	112	UVM_ERROR @ 97654844660 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (10650624 [0xa28400] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xa28400 != exp 0x0 UVM_INFO @ 97654844660 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 5/8 UVM_INFO @ 97654844660 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 6/8 UVM_INFO @ 99685884660 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.tpm_vseq] starting sequence 5/9 UVM_INFO @ 105580844660 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 6/8