Simulation Results: otp_ctrl

 
23/03/2026 16:04:27 DVSim: v1.16.0 sha: 7fd2965 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 73.56 %
  • code
  • 71.67 %
  • assert
  • 93.51 %
  • func
  • 55.49 %
  • line
  • 87.61 %
  • branch
  • 83.94 %
  • cond
  • 85.70 %
  • toggle
  • 64.09 %
  • FSM
  • 37.02 %
Validation stages
V1
100.00%
V2
72.00%
V2S
80.36%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.030s 0.000us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 3.070s 0.000us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.470s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 3.040s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 10.060s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otp_ctrl_csr_mem_rw_with_rand_reset 2.810s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.470s 0.000us 1 1 100.00
otp_ctrl_csr_aliasing 10.060s 0.000us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.900s 0.000us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.540s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 106.470s 0.000us 0 1 0.00
init_fail 0 1 0.00
otp_ctrl_init_fail 1.730s 0.000us 0 1 0.00
partition_check 2 2 100.00
otp_ctrl_background_chks 24.460s 0.000us 1 1 100.00
otp_ctrl_check_fail 5.930s 0.000us 1 1 100.00
regwen_during_otp_init 0 1 0.00
otp_ctrl_regwen 3.460s 0.000us 0 1 0.00
partition_lock 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 4.820s 0.000us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 5.420s 0.000us 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 22.630s 0.000us 1 1 100.00
otp_macro_errors 0 1 0.00
otp_ctrl_macro_errs 3.910s 0.000us 0 1 0.00
test_access 0 1 0.00
otp_ctrl_test_access 3.300s 0.000us 0 1 0.00
stress_all 0 1 0.00
otp_ctrl_stress_all 82.870s 0.000us 0 1 0.00
intr_test 1 1 100.00
otp_ctrl_intr_test 2.150s 0.000us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 2.360s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 5.650s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 5.650s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 3.070s 0.000us 1 1 100.00
otp_ctrl_csr_rw 1.470s 0.000us 1 1 100.00
otp_ctrl_csr_aliasing 10.060s 0.000us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.470s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 3.070s 0.000us 1 1 100.00
otp_ctrl_csr_rw 1.470s 0.000us 1 1 100.00
otp_ctrl_csr_aliasing 10.060s 0.000us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.470s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_tl_intg_err 22.900s 0.000us 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 22.900s 0.000us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
sec_cm_part_fsm_local_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_ctrl_macro_errs 3.910s 0.000us 0 1 0.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
sec_cm_part_fsm_global_esc 1 2 50.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_ctrl_macro_errs 3.910s 0.000us 0 1 0.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 7.210s 0.000us 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_part_data_reg_integrity 0 1 0.00
otp_ctrl_init_fail 1.730s 0.000us 0 1 0.00
sec_cm_part_data_reg_bkgn_chk 1 1 100.00
otp_ctrl_check_fail 5.930s 0.000us 1 1 100.00
sec_cm_part_mem_regren 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
sec_cm_part_mem_sw_unreadable 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
sec_cm_part_mem_sw_unwritable 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
sec_cm_lc_part_mem_sw_noaccess 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
sec_cm_access_ctrl_mubi 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 0 1 0.00
otp_ctrl_dai_lock 7.710s 0.000us 0 1 0.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 243.760s 0.000us 1 1 100.00
sec_cm_direct_access_config_regwen 0 1 0.00
otp_ctrl_regwen 3.460s 0.000us 0 1 0.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 5.370s 0.000us 1 1 100.00
sec_cm_macro_mem_integrity 0 1 0.00
otp_ctrl_macro_errs 3.910s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 64.630s 0.000us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
otp_ctrl_stress_all_with_rand_reset 1.550s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_partition_walk 95968150342595828664173183609590968709908464894587997417651395970046548271752 112753
UVM_ERROR @ 6807170338 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_partition_walk_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 16080 [0x3ed0]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 6807170338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_low_freq_read 91073866489768638899195525355309768595156191479880328205028070340073043688216 89
UVM_ERROR @ 22338124263 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22338124263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 81890440841320293457258448106392521113578494108030766643284092369869751692700 30937
UVM_ERROR @ 24167450145 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 24167450145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: *
otp_ctrl_init_fail 107776867049078320989180889304976152624897761305221653284933734643291866239367 537
UVM_ERROR @ 36801982 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 36801982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 74902991744821871485021154127477717936915855259254219043005120899737275973 2756
UVM_ERROR @ 136064714 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 136064714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state
otp_ctrl_dai_lock 29156570664642805415879042738090713835513491675618544225638936415207194299071 7124
UVM_ERROR @ 1597450276 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1597450276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_*
otp_ctrl_macro_errs 78288821501253790300667045480545091420518225301987397346227337575543727732247 2049
UVM_ERROR @ 189812340 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 189812340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 29776921035059792131294359713275355398259766241735744313406039342325555547525 2358
UVM_ERROR @ 121145569 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 121145569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *
otp_ctrl_stress_all_with_rand_reset 20543455578259018097491333023361393529912916618746268533778433201380220333826 94
UVM_ERROR @ 31593724 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31593724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---