Simulation Results: mbx

 
23/04/2026 19:40:15 DVSim: v1.32.0 sha: a82c489 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.34 %
  • code
  • 89.95 %
  • assert
  • 96.96 %
  • func
  • 75.10 %
  • block
  • 95.48 %
  • line
  • 95.88 %
  • branch
  • 87.93 %
  • toggle
  • 86.04 %
Validation stages
V1
83.33%
V2
72.73%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 38.000s 2105.877us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 24.589us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 35.806us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 2.000s 70.072us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 194.868us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 2.000s 36.524us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 35.806us 1 1 100.00
mbx_csr_aliasing 2.000s 194.868us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 1 1 100.00
mbx_stress 78.000s 7223.689us 1 1 100.00
mbx_max_activity 0 1 0.00
mbx_stress_zero_delays 2.000s 48.665us 0 1 0.00
mbx_imbx_oob 0 1 0.00
mbx_imbx_oob 5.000s 342.756us 0 1 0.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 18.000s 2206.068us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 15.691us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 43.667us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 1.000s 4.792us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 1.000s 4.792us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 24.589us 1 1 100.00
mbx_csr_rw 1.000s 35.806us 1 1 100.00
mbx_csr_aliasing 2.000s 194.868us 1 1 100.00
mbx_same_csr_outstanding 1.000s 61.726us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 24.589us 1 1 100.00
mbx_csr_rw 1.000s 35.806us 1 1 100.00
mbx_csr_aliasing 2.000s 194.868us 1 1 100.00
mbx_same_csr_outstanding 1.000s 61.726us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 254.875us 1 1 100.00
mbx_sec_cm 1.000s 52.239us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched
mbx_stress_zero_delays 60959750877525590116830230995791252424134615211305343932130407625350237868426 93
UVM_INFO @ 48664501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register
mbx_imbx_oob 51708936803776623802029970627125456439539013283588059790948468741729568550947 128
UVM_INFO @ 342756464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *).
mbx_tl_errors 90569347125867281053125939253083579992470652171654042665943453845584161061133 85
TL item was: req: (cip_tl_seq_item@15785) { a_addr: 'h76c51034 a_data: 'he0372164 a_mask: 'h9 a_size: 'h2 a_param: 'h0 a_source: 'hf a_opcode: 'h1 a_user: 'h24597 d_param: 'h0 d_source: 'hf d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 4792461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 1608165064211555250332974145087490476915720492195016419593589976578425857227 86
TL item was: req: (cip_tl_seq_item@18694) { a_addr: 'h215b0374 a_data: 'h7320a439 a_mask: 'hb a_size: 'h2 a_param: 'h0 a_source: 'h4e a_opcode: 'h1 a_user: 'h278b3 d_param: 'h0 d_source: 'h4e d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 36524319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---