Simulation Results

Simulation Results: i2c

30/07/2026 19:40:39 DVSim: v1.50.0 sha: 2695753 json Branch: master Tool: xcelium [unknown]

Coverage statistics

Total
88.96 %

code
89.22 %

assert
97.25 %

func
80.40 %

block
95.90 %

line
95.31 %

branch
92.63 %

toggle
86.93 %

FSM
82.01 %

Validation stages

V1		100.00%
V2		82.93%
V2S		100.00%
V3		0.00%

7/7 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
host_smoke				1	1	100.00
	i2c_host_smoke	300.000s	6962.974us	1	1	100.00
target_smoke				1	1	100.00
	i2c_target_smoke	8.000s	1760.395us	1	1	100.00
csr_hw_reset				1	1	100.00
	i2c_csr_hw_reset	2.000s	21.206us	1	1	100.00
csr_rw				1	1	100.00
	i2c_csr_rw	2.000s	29.613us	1	1	100.00
csr_bit_bash				1	1	100.00
	i2c_csr_bit_bash	3.000s	914.832us	1	1	100.00
csr_aliasing				1	1	100.00
	i2c_csr_aliasing	3.000s	206.902us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	i2c_csr_mem_rw_with_rand_reset	1.000s	118.110us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	i2c_csr_rw	2.000s	29.613us	1	1	100.00
	i2c_csr_aliasing	3.000s	206.902us	1	1	100.00

34/41 passed

82.93 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
host_error_intr				0	1	0.00
	i2c_host_error_intr	2.000s	26.625us	0	1	0.00
host_stress_all				0	1	0.00
	i2c_host_stress_all	197.000s	28491.866us	0	1	0.00
host_maxperf				1	1	100.00
	i2c_host_perf	39.000s	4482.582us	1	1	100.00
host_override				1	1	100.00
	i2c_host_override	1.000s	25.460us	1	1	100.00
host_fifo_watermark				1	1	100.00
	i2c_host_fifo_watermark	1763.000s	8204.323us	1	1	100.00
host_fifo_overflow				1	1	100.00
	i2c_host_fifo_overflow	1140.000s	1985.657us	1	1	100.00
host_fifo_reset				3	3	100.00
	i2c_host_fifo_reset_fmt	2.000s	435.131us	1	1	100.00
	i2c_host_fifo_fmt_empty	22.000s	301.091us	1	1	100.00
	i2c_host_fifo_reset_rx	7.000s	206.268us	1	1	100.00
host_fifo_full				1	1	100.00
	i2c_host_fifo_full	628.000s	3065.944us	1	1	100.00
host_timeout				1	1	100.00
	i2c_host_stretch_timeout	11.000s	1247.035us	1	1	100.00
i2c_host_mode_toggle				0	1	0.00
	i2c_host_mode_toggle	1.000s	45.517us	0	1	0.00
target_glitch				0	1	0.00
	i2c_target_glitch	5.000s	443.427us	0	1	0.00
target_stress_all				0	1	0.00
	i2c_target_stress_all	3601.000s	0.000us	0	1	0.00
target_maxperf				1	1	100.00
	i2c_target_perf	4.000s	2398.748us	1	1	100.00
target_fifo_empty				2	2	100.00
	i2c_target_stress_rd	9.000s	644.524us	1	1	100.00
	i2c_target_intr_smoke	6.000s	858.543us	1	1	100.00
target_fifo_reset				2	2	100.00
	i2c_target_fifo_reset_acq	2.000s	412.387us	1	1	100.00
	i2c_target_fifo_reset_tx	2.000s	186.472us	1	1	100.00
target_fifo_full				2	3	66.67
	i2c_target_stress_wr	3600.000s	0.000us	0	1	0.00
	i2c_target_stress_rd	9.000s	644.524us	1	1	100.00
	i2c_target_intr_stress_wr	605.000s	4000.971us	1	1	100.00
target_timeout				1	1	100.00
	i2c_target_timeout	9.000s	1203.338us	1	1	100.00
target_clock_stretch				1	1	100.00
	i2c_target_stretch	1653.000s	3123.841us	1	1	100.00
bad_address				1	1	100.00
	i2c_target_bad_addr	5.000s	1026.020us	1	1	100.00
target_mode_glitch				0	1	0.00
	i2c_target_hrst	15.000s	10138.399us	0	1	0.00
target_fifo_watermark				2	2	100.00
	i2c_target_fifo_watermarks_acq	4.000s	1334.275us	1	1	100.00
	i2c_target_fifo_watermarks_tx	3.000s	134.112us	1	1	100.00
host_mode_config_perf				2	2	100.00
	i2c_host_perf	39.000s	4482.582us	1	1	100.00
	i2c_host_perf_precise	4.000s	103.471us	1	1	100.00
host_mode_clock_stretching				1	1	100.00
	i2c_host_stretch_timeout	11.000s	1247.035us	1	1	100.00
target_mode_tx_stretch_ctrl				1	1	100.00
	i2c_target_tx_stretch_ctrl	5.000s	292.088us	1	1	100.00
target_mode_nack_generation				3	3	100.00
	i2c_target_nack_acqfull	4.000s	2259.913us	1	1	100.00
	i2c_target_nack_acqfull_addr	5.000s	2278.994us	1	1	100.00
	i2c_target_nack_txstretch	3.000s	148.162us	1	1	100.00
host_mode_halt_on_nak				1	1	100.00
	i2c_host_may_nack	3.000s	3304.199us	1	1	100.00
target_mode_smbus_maxlen				1	1	100.00
	i2c_target_smbus_maxlen	4.000s	507.968us	1	1	100.00
alert_test				1	1	100.00
	i2c_alert_test	1.000s	25.844us	1	1	100.00
intr_test				1	1	100.00
	i2c_intr_test	2.000s	52.917us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	i2c_tl_errors	3.000s	332.346us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	i2c_tl_errors	3.000s	332.346us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	i2c_csr_hw_reset	2.000s	21.206us	1	1	100.00
	i2c_csr_rw	2.000s	29.613us	1	1	100.00
	i2c_csr_aliasing	3.000s	206.902us	1	1	100.00
	i2c_same_csr_outstanding	1.000s	37.125us	1	1	100.00
tl_d_partial_access				4	4	100.00
	i2c_csr_hw_reset	2.000s	21.206us	1	1	100.00
	i2c_csr_rw	2.000s	29.613us	1	1	100.00
	i2c_csr_aliasing	3.000s	206.902us	1	1	100.00
	i2c_same_csr_outstanding	1.000s	37.125us	1	1	100.00

V2S

2/2 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	i2c_tl_intg_err	3.000s	266.392us	1	1	100.00
	i2c_sec_cm	1.000s	138.977us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	i2c_tl_intg_err	3.000s	266.392us	1	1	100.00

0/3 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Total
host_stress_all_with_rand_reset				1
	i2c_host_stress_all_with_rand_reset	4.000s	221.921us	1
target_error_intr				1
	i2c_target_unexp_stop	2.000s	193.937us	1
target_stress_all_with_rand_reset				1
	i2c_target_stress_all_with_rand_reset	12.000s	3508.190us	1

Error Messages

	Test	seed	line	log context
UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between				2 test runs
	i2c_host_error_intr	66374881802946412668875262295799037751767229149910331298103466902587153505466	89	UVM_INFO @ 26624600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	i2c_host_stress_all	67559248444969115740994409223655515905214830815117448384897620666010426505213	135	UVM_INFO @ 28491866264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Job timed out after * minutes				2 test runs
	i2c_target_stress_wr	15729804364521292766971224383017446987140154573171604973131501781149404660117	None
	i2c_target_stress_all	91227132030874483883820632564583697489127287527592038499852693221735683168906	None
UVM_ERROR (cip_base_vseq.sv:1287) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				2 test runs
	i2c_host_stress_all_with_rand_reset	113118841202120563339576210621915045851527499711506721751986034560759605655884	94	UVM_INFO @ 221921362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	i2c_target_stress_all_with_rand_reset	9065595444067823940257182444188608344146814752358484487580270639148330852881	130	UVM_INFO @ 3508189675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between				1 test run
	i2c_target_glitch	58125716509453362487235561355615829025482928527791289465619669528694414238130	93	UVM_INFO @ 443427335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
xmsim: E,ASRTST (/nightly/current_run/scratch/master/i2c-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_i2c_/rtl/i2c_fifos.sv,320): Assertion TxWriteStableBeforeHandshake_A has failed (* cycles, starting * PS)				1 test run
	i2c_target_unexp_stop	109637552210186680917312292607887574571805526537242062971730527360899900864969	89	UVM_ERROR @ 193937224 ps: (i2c_fifos.sv:320) [ASSERT FAILED] TxWriteStableBeforeHandshake_A UVM_INFO @ 193937224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!				1 test run
	i2c_target_hrst	14690450427226244252565613503385253057112090652562993008141593423845379499234	88	UVM_INFO @ 10138398644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=, Comparison=CompareOpEq, exp_data=, call_count=3)				1 test run
	i2c_host_mode_toggle	48885698346701364936394407225910440849565431056770417907539026466010982647788	88	UVM_INFO @ 45516687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---