Simulation Results: kmac/unmasked

 
03/04/2026 17:01:04 DVSim: v1.16.0 sha: 3ba6465 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.61 %
  • code
  • 92.38 %
  • assert
  • 97.90 %
  • func
  • 96.54 %
  • line
  • 97.65 %
  • branch
  • 95.93 %
  • cond
  • 94.75 %
  • toggle
  • 100.00 %
  • FSM
  • 73.55 %
Validation stages
V1
100.00%
V2
99.17%
V2S
99.80%
V3
90.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 50 50 100.00
kmac_smoke 71.080s 0.000us 50 50 100.00
csr_hw_reset 5 5 100.00
kmac_csr_hw_reset 1.170s 0.000us 5 5 100.00
csr_rw 20 20 100.00
kmac_csr_rw 1.470s 0.000us 20 20 100.00
csr_bit_bash 5 5 100.00
kmac_csr_bit_bash 11.280s 0.000us 5 5 100.00
csr_aliasing 5 5 100.00
kmac_csr_aliasing 6.610s 0.000us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
kmac_csr_mem_rw_with_rand_reset 2.660s 0.000us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
kmac_csr_rw 1.470s 0.000us 20 20 100.00
kmac_csr_aliasing 6.610s 0.000us 5 5 100.00
mem_walk 5 5 100.00
kmac_mem_walk 0.990s 0.000us 5 5 100.00
mem_partial_access 5 5 100.00
kmac_mem_partial_access 1.830s 0.000us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 50 50 100.00
kmac_long_msg_and_output 3131.380s 0.000us 50 50 100.00
burst_write 50 50 100.00
kmac_burst_write 851.710s 0.000us 50 50 100.00
test_vectors 40 40 100.00
kmac_test_vectors_sha3_224 1752.970s 0.000us 5 5 100.00
kmac_test_vectors_sha3_256 1531.220s 0.000us 5 5 100.00
kmac_test_vectors_sha3_384 1540.510s 0.000us 5 5 100.00
kmac_test_vectors_sha3_512 905.790s 0.000us 5 5 100.00
kmac_test_vectors_shake_128 2405.470s 0.000us 5 5 100.00
kmac_test_vectors_shake_256 2016.910s 0.000us 5 5 100.00
kmac_test_vectors_kmac 2.560s 0.000us 5 5 100.00
kmac_test_vectors_kmac_xof 2.840s 0.000us 5 5 100.00
sideload 50 50 100.00
kmac_sideload 413.910s 0.000us 50 50 100.00
app 50 50 100.00
kmac_app 296.150s 0.000us 50 50 100.00
app_with_partial_data 10 10 100.00
kmac_app_with_partial_data 224.010s 0.000us 10 10 100.00
entropy_refresh 50 50 100.00
kmac_entropy_refresh 301.640s 0.000us 50 50 100.00
error 50 50 100.00
kmac_error 412.340s 0.000us 50 50 100.00
key_error 50 50 100.00
kmac_key_error 17.660s 0.000us 50 50 100.00
sideload_invalid 43 50 86.00
kmac_sideload_invalid 110.430s 0.000us 43 50 86.00
edn_timeout_error 20 20 100.00
kmac_edn_timeout_error 49.820s 0.000us 20 20 100.00
entropy_mode_error 20 20 100.00
kmac_entropy_mode_error 36.290s 0.000us 20 20 100.00
entropy_ready_error 10 10 100.00
kmac_entropy_ready_error 74.790s 0.000us 10 10 100.00
lc_escalation 50 50 100.00
kmac_lc_escalation 44.340s 0.000us 50 50 100.00
stress_all 50 50 100.00
kmac_stress_all 2323.730s 0.000us 50 50 100.00
intr_test 50 50 100.00
kmac_intr_test 1.140s 0.000us 50 50 100.00
alert_test 50 50 100.00
kmac_alert_test 1.310s 0.000us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
kmac_tl_errors 3.370s 0.000us 20 20 100.00
tl_d_illegal_access 20 20 100.00
kmac_tl_errors 3.370s 0.000us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
kmac_csr_hw_reset 1.170s 0.000us 5 5 100.00
kmac_csr_rw 1.470s 0.000us 20 20 100.00
kmac_csr_aliasing 6.610s 0.000us 5 5 100.00
kmac_same_csr_outstanding 2.530s 0.000us 20 20 100.00
tl_d_partial_access 50 50 100.00
kmac_csr_hw_reset 1.170s 0.000us 5 5 100.00
kmac_csr_rw 1.470s 0.000us 20 20 100.00
kmac_csr_aliasing 6.610s 0.000us 5 5 100.00
kmac_same_csr_outstanding 2.530s 0.000us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 20 20 100.00
kmac_shadow_reg_errors 2.620s 0.000us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
kmac_shadow_reg_errors 2.620s 0.000us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
kmac_shadow_reg_errors 2.620s 0.000us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
kmac_shadow_reg_errors 2.620s 0.000us 20 20 100.00
shadow_reg_update_error_with_csr_rw 19 20 95.00
kmac_shadow_reg_errors_with_csr_rw 4.810s 0.000us 19 20 95.00
tl_intg_err 25 25 100.00
kmac_tl_intg_err 5.730s 0.000us 20 20 100.00
kmac_sec_cm 83.020s 0.000us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
kmac_tl_intg_err 5.730s 0.000us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
kmac_lc_escalation 44.340s 0.000us 50 50 100.00
sec_cm_sw_key_key_masking 50 50 100.00
kmac_smoke 71.080s 0.000us 50 50 100.00
sec_cm_key_sideload 50 50 100.00
kmac_sideload 413.910s 0.000us 50 50 100.00
sec_cm_cfg_shadowed_config_shadow 20 20 100.00
kmac_shadow_reg_errors 2.620s 0.000us 20 20 100.00
sec_cm_fsm_sparse 5 5 100.00
kmac_sec_cm 83.020s 0.000us 5 5 100.00
sec_cm_ctr_redun 5 5 100.00
kmac_sec_cm 83.020s 0.000us 5 5 100.00
sec_cm_packer_ctr_redun 5 5 100.00
kmac_sec_cm 83.020s 0.000us 5 5 100.00
sec_cm_cfg_shadowed_config_regwen 50 50 100.00
kmac_smoke 71.080s 0.000us 50 50 100.00
sec_cm_fsm_global_esc 50 50 100.00
kmac_lc_escalation 44.340s 0.000us 50 50 100.00
sec_cm_fsm_local_esc 5 5 100.00
kmac_sec_cm 83.020s 0.000us 5 5 100.00
sec_cm_absorbed_ctrl_mubi 10 10 100.00
kmac_mubi 319.290s 0.000us 10 10 100.00
sec_cm_sw_cmd_ctrl_sparse 50 50 100.00
kmac_smoke 71.080s 0.000us 50 50 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 9 10 90.00
kmac_stress_all_with_rand_reset 214.660s 0.000us 9 10 90.00

Error Messages

   Test seed line log context
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.prefix_* reset value: *
kmac_shadow_reg_errors_with_csr_rw 16184538994801411431015924662160396464305803901463127470727009403713895385208 168
UVM_ERROR @ 15619669 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (354670217 [0x1523d689] vs 2625046783 [0x9c7708ff]) Regname: kmac_reg_block.prefix_8 reset value: 0x0
UVM_INFO @ 15619669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
kmac_stress_all_with_rand_reset 12836754879054031265473292697564171975706201113117578102182457916606041713352 95
UVM_ERROR @ 2014493648 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 2014493648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6)
kmac_sideload_invalid 79960092222708486659930439695234623037790434057842031670525480352778837189912 83
UVM_FATAL @ 10069097415 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6a54000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10069097415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sideload_invalid 16339210668300448155107852410660989479203541830210139053061687988905415794410 82
UVM_FATAL @ 10288536396 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5b192000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10288536396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7)
kmac_sideload_invalid 91420677352288149143041216383117932064753572772838900506565534774341935479834 83
UVM_FATAL @ 10104419879 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf5bc3000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
UVM_INFO @ 10104419879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)
kmac_sideload_invalid 105054112507869940477377750151106847953791123203752814794083558265172842826880 80
UVM_FATAL @ 10096982573 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6ef54000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10096982573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12)
kmac_sideload_invalid 14825742159023982256019281502540426837899235660971098010914539044918506526187 89
UVM_FATAL @ 10259507900 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x79aa0000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)
UVM_INFO @ 10259507900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sideload_invalid 35272656842748548433494344745062858396371832677143574296781364891814206113960 90
UVM_FATAL @ 10220759092 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa2ec5000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)
UVM_INFO @ 10220759092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)
kmac_sideload_invalid 1173393303406361272701985998659611148205986736557892350661061881701510218534 79
UVM_FATAL @ 10022190324 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1a8dc000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10022190324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---