Simulation Results

Simulation Results: gpio

06/06/2026 03:31:11 DVSim: v1.49.0 sha: 2348eb2 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
97.12 %

code
92.64 %

assert
98.73 %

func
100.00 %

line
99.89 %

branch
98.38 %

cond
95.76 %

toggle
94.19 %

FSM
75.00 %

Validation stages

V1		98.11%
V2		93.63%
V2S		93.33%
V3		40.00%
unmapped		100.00%

52/53 passed

98.11 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				40	40	100.00
	gpio_smoke	2.310s	51.422us	10	10	100.00
	gpio_smoke_no_pullup_pulldown	1.970s	148.390us	10	10	100.00
	gpio_smoke_en_cdc_prim	2.280s	102.030us	10	10	100.00
	gpio_smoke_no_pullup_pulldown_en_cdc_prim	2.080s	92.218us	10	10	100.00
csr_hw_reset				1	1	100.00
	gpio_csr_hw_reset	1.150s	54.275us	1	1	100.00
csr_rw				4	5	80.00
	gpio_csr_rw	1.190s	26.753us	4	5	80.00
csr_bit_bash				1	1	100.00
	gpio_csr_bit_bash	8.330s	1664.699us	1	1	100.00
csr_aliasing				1	1	100.00
	gpio_csr_aliasing	1.680s	232.586us	1	1	100.00
csr_mem_rw_with_rand_reset				5	5	100.00
	gpio_csr_mem_rw_with_rand_reset	1.150s	40.988us	5	5	100.00
regwen_csr_and_corresponding_lockable_csr				5	6	83.33
	gpio_csr_rw	1.190s	26.753us	4	5	80.00
	gpio_csr_aliasing	1.680s	232.586us	1	1	100.00

147/157 passed

93.63 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
direct_and_masked_out				20	20	100.00
	gpio_random_dout_din	2.030s	71.458us	10	10	100.00
	gpio_random_dout_din_no_pullup_pulldown	1.880s	34.670us	10	10	100.00
out_in_regs_read_write				10	10	100.00
	gpio_dout_din_regs_random_rw	1.350s	86.338us	10	10	100.00
gpio_interrupt_programming				10	10	100.00
	gpio_intr_rand_pgm	1.800s	54.623us	10	10	100.00
random_interrupt_trigger				10	10	100.00
	gpio_rand_intr_trigger	4.340s	81.679us	10	10	100.00
interrupt_and_noise_filter				10	10	100.00
	gpio_intr_with_filter_rand_intr_event	4.280s	279.251us	10	10	100.00
noise_filter_stress				10	10	100.00
	gpio_filter_stress	36.090s	1546.730us	10	10	100.00
regs_long_reads_and_writes				10	10	100.00
	gpio_random_long_reg_writes_reg_reads	6.240s	266.058us	10	10	100.00
full_random				10	10	100.00
	gpio_full_random	1.550s	251.257us	10	10	100.00
stress_all				2	10	20.00
	gpio_stress_all	92.770s	14792.892us	2	10	20.00
alert_test				10	10	100.00
	gpio_alert_test	0.920s	23.995us	10	10	100.00
intr_test				10	10	100.00
	gpio_intr_test	0.940s	17.164us	10	10	100.00
tl_d_oob_addr_access				25	25	100.00
	gpio_tl_errors	3.690s	205.051us	25	25	100.00
tl_d_illegal_access				25	25	100.00
	gpio_tl_errors	3.690s	205.051us	25	25	100.00
tl_d_outstanding_access				10	12	83.33
	gpio_csr_rw	1.190s	26.753us	4	5	80.00
	gpio_same_csr_outstanding	1.440s	693.515us	4	5	80.00
	gpio_csr_aliasing	1.680s	232.586us	1	1	100.00
	gpio_csr_hw_reset	1.150s	54.275us	1	1	100.00
tl_d_partial_access				10	12	83.33
	gpio_csr_rw	1.190s	26.753us	4	5	80.00
	gpio_same_csr_outstanding	1.440s	693.515us	4	5	80.00
	gpio_csr_aliasing	1.680s	232.586us	1	1	100.00
	gpio_csr_hw_reset	1.150s	54.275us	1	1	100.00

V2S

28/30 passed

93.33 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				28	30	93.33
	gpio_tl_intg_err	3.710s	369.925us	23	25	92.00
	gpio_sec_cm	1.480s	175.174us	5	5	100.00
sec_cm_bus_integrity				23	25	92.00
	gpio_tl_intg_err	3.710s	369.925us	23	25	92.00

8/20 passed

40.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
straps_data				8	10	80.00
	gpio_rand_straps	0.900s	18.634us	8	10	80.00
stress_all_with_rand_reset				0	10	0.00
	gpio_stress_all_with_rand_reset	20.900s	4857.792us	0	10	0.00

unmapped

50/50 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				50	50	100.00
	gpio_inp_prd_cnt	0.920s	28.393us	50	50	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*])				10 test runs
	gpio_stress_all	28509821232413959056228513293121983578298898350383526324208931390003736898242	805	UVM_INFO @ 5110806682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	34342353413749302174149231478922996857139918078926571380413996465448076149307	1132	UVM_INFO @ 4257865917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	33947953840123134950773566527992327565935959717007214177718618636532961592343	75	UVM_INFO @ 4762068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	58575736173418510817950850316326077134182904893970539992790065723656880872849	416	UVM_INFO @ 5438503057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	53653200053316042492988733971299845098759386133357297323296802757480545055792	836	UVM_INFO @ 6450193334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	49664494894048652917510738999038962061005415462959249975547949949131519678563	331	UVM_INFO @ 1217875853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_rand_straps	58362021724002518822142187905519796138912306636997510605238117895833155455986	75	UVM_INFO @ 2452730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	97026375071425867293973472949574581060782010345196275619689226064833782623131	78	UVM_INFO @ 316254778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	111086700396299426184858046903882451514104977613423092111279974535318873631688	2317	UVM_INFO @ 14792892231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all	9093740184916117316650461978572763573390459879084421993801976526578183749871	486	UVM_INFO @ 3279620549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done)				6 test runs
	gpio_stress_all_with_rand_reset	86189238196251721376038560292057479151132154062071249873388557086139342370579	290	UVM_INFO @ 3898135254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	13277488983183325313276999389820187713336608678575042755978000189296360272411	81	UVM_INFO @ 783406775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	37960611462836655509466420640048404324008029190767280693513025486706370406027	83	UVM_INFO @ 47931103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	23240391446768915815799023068368429936279164591697440549527690361007500472176	80	UVM_INFO @ 6061793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	3468068945956641648668206673835080684330750671316164622431731931572445564149	80	UVM_INFO @ 12268493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	88572073123182057800674700247598903541457397686044388663004803580526815837922	80	UVM_INFO @ 7859842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*				4 test runs
	gpio_stress_all_with_rand_reset	4833408652403468221956628783143106491788841763367609152353306988728292308152	273	UVM_INFO @ 659349085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	86850644558435892238243887817400706846066389194487269912698529734037671508893	78	UVM_INFO @ 1287362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	43119573725930919941573967352549129418287308321481792399947241708344224159940	669	UVM_INFO @ 4857792264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	gpio_stress_all_with_rand_reset	29631959569704910072976010478497911565880445468897032319688963388013729541615	314	UVM_INFO @ 525914538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [] vs []) addr read out mismatch				1 test run
	gpio_same_csr_outstanding	80487453998228917549440886801220492152547472185250285872587164475491569933706	77	UVM_INFO @ 39628284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_val_ reset value: *				1 test run
	gpio_csr_rw	71821655303828920490966224475636040604200962318300812882832079038592109125061	76	UVM_INFO @ 4220163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_.enable reset value: *				1 test run
	gpio_tl_intg_err	64030706259641492267367155205750725848045113498339762601831137179510033915286	303	UVM_INFO @ 313033827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: gpio_reg_block.inp_prd_cnt_ctrl_ reset value: *				1 test run
	gpio_tl_intg_err	37119845119646255056972608279569985869856906219416998268095667896324568437716	147	UVM_INFO @ 100142615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---