Simulation Results

Simulation Results: kmac/unmasked

29/03/2026 00:12:07 DVSim: v1.16.0 sha: 34fa6f9 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
95.34 %

code
91.88 %

assert
97.90 %

func
96.25 %

line
97.65 %

branch
95.93 %

cond
94.75 %

toggle
100.00 %

FSM
71.07 %

Validation stages

V1		100.00%
V2		97.02%
V2S		100.00%
V3		60.00%

140/140 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				50	50	100.00
	kmac_smoke	59.900s	0.000us	50	50	100.00
csr_hw_reset				5	5	100.00
	kmac_csr_hw_reset	1.510s	0.000us	5	5	100.00
csr_rw				20	20	100.00
	kmac_csr_rw	1.570s	0.000us	20	20	100.00
csr_bit_bash				5	5	100.00
	kmac_csr_bit_bash	21.870s	0.000us	5	5	100.00
csr_aliasing				5	5	100.00
	kmac_csr_aliasing	10.800s	0.000us	5	5	100.00
csr_mem_rw_with_rand_reset				20	20	100.00
	kmac_csr_mem_rw_with_rand_reset	2.880s	0.000us	20	20	100.00
regwen_csr_and_corresponding_lockable_csr				25	25	100.00
	kmac_csr_rw	1.570s	0.000us	20	20	100.00
	kmac_csr_aliasing	10.800s	0.000us	5	5	100.00
mem_walk				5	5	100.00
	kmac_mem_walk	1.090s	0.000us	5	5	100.00
mem_partial_access				5	5	100.00
	kmac_mem_partial_access	1.930s	0.000us	5	5	100.00

815/840 passed

97.02 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				50	50	100.00
	kmac_long_msg_and_output	2663.690s	0.000us	50	50	100.00
burst_write				50	50	100.00
	kmac_burst_write	890.340s	0.000us	50	50	100.00
test_vectors				40	40	100.00
	kmac_test_vectors_sha3_224	1686.170s	0.000us	5	5	100.00
	kmac_test_vectors_sha3_256	2083.290s	0.000us	5	5	100.00
	kmac_test_vectors_sha3_384	885.130s	0.000us	5	5	100.00
	kmac_test_vectors_sha3_512	818.510s	0.000us	5	5	100.00
	kmac_test_vectors_shake_128	2246.350s	0.000us	5	5	100.00
	kmac_test_vectors_shake_256	1200.000s	0.000us	5	5	100.00
	kmac_test_vectors_kmac	3.240s	0.000us	5	5	100.00
	kmac_test_vectors_kmac_xof	2.690s	0.000us	5	5	100.00
sideload				50	50	100.00
	kmac_sideload	386.360s	0.000us	50	50	100.00
app				50	50	100.00
	kmac_app	310.920s	0.000us	50	50	100.00
app_with_partial_data				10	10	100.00
	kmac_app_with_partial_data	263.710s	0.000us	10	10	100.00
entropy_refresh				50	50	100.00
	kmac_entropy_refresh	325.820s	0.000us	50	50	100.00
error				49	50	98.00
	kmac_error	402.670s	0.000us	49	50	98.00
key_error				49	50	98.00
	kmac_key_error	14.710s	0.000us	49	50	98.00
sideload_invalid				27	50	54.00
	kmac_sideload_invalid	140.620s	0.000us	27	50	54.00
edn_timeout_error				20	20	100.00
	kmac_edn_timeout_error	35.330s	0.000us	20	20	100.00
entropy_mode_error				20	20	100.00
	kmac_entropy_mode_error	39.540s	0.000us	20	20	100.00
entropy_ready_error				10	10	100.00
	kmac_entropy_ready_error	62.210s	0.000us	10	10	100.00
lc_escalation				50	50	100.00
	kmac_lc_escalation	37.040s	0.000us	50	50	100.00
stress_all				50	50	100.00
	kmac_stress_all	2620.660s	0.000us	50	50	100.00
intr_test				50	50	100.00
	kmac_intr_test	1.160s	0.000us	50	50	100.00
alert_test				50	50	100.00
	kmac_alert_test	1.350s	0.000us	50	50	100.00
tl_d_oob_addr_access				20	20	100.00
	kmac_tl_errors	4.270s	0.000us	20	20	100.00
tl_d_illegal_access				20	20	100.00
	kmac_tl_errors	4.270s	0.000us	20	20	100.00
tl_d_outstanding_access				50	50	100.00
	kmac_csr_hw_reset	1.510s	0.000us	5	5	100.00
	kmac_csr_rw	1.570s	0.000us	20	20	100.00
	kmac_csr_aliasing	10.800s	0.000us	5	5	100.00
	kmac_same_csr_outstanding	2.920s	0.000us	20	20	100.00
tl_d_partial_access				50	50	100.00
	kmac_csr_hw_reset	1.510s	0.000us	5	5	100.00
	kmac_csr_rw	1.570s	0.000us	20	20	100.00
	kmac_csr_aliasing	10.800s	0.000us	5	5	100.00
	kmac_same_csr_outstanding	2.920s	0.000us	20	20	100.00

V2S

495/495 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				20	20	100.00
	kmac_shadow_reg_errors	2.580s	0.000us	20	20	100.00
shadow_reg_read_clear_staged_value				20	20	100.00
	kmac_shadow_reg_errors	2.580s	0.000us	20	20	100.00
shadow_reg_storage_error				20	20	100.00
	kmac_shadow_reg_errors	2.580s	0.000us	20	20	100.00
shadowed_reset_glitch				20	20	100.00
	kmac_shadow_reg_errors	2.580s	0.000us	20	20	100.00
shadow_reg_update_error_with_csr_rw				20	20	100.00
	kmac_shadow_reg_errors_with_csr_rw	6.170s	0.000us	20	20	100.00
tl_intg_err				25	25	100.00
	kmac_sec_cm	69.980s	0.000us	5	5	100.00
	kmac_tl_intg_err	5.750s	0.000us	20	20	100.00
sec_cm_bus_integrity				20	20	100.00
	kmac_tl_intg_err	5.750s	0.000us	20	20	100.00
sec_cm_lc_escalate_en_intersig_mubi				50	50	100.00
	kmac_lc_escalation	37.040s	0.000us	50	50	100.00
sec_cm_sw_key_key_masking				50	50	100.00
	kmac_smoke	59.900s	0.000us	50	50	100.00
sec_cm_key_sideload				50	50	100.00
	kmac_sideload	386.360s	0.000us	50	50	100.00
sec_cm_cfg_shadowed_config_shadow				20	20	100.00
	kmac_shadow_reg_errors	2.580s	0.000us	20	20	100.00
sec_cm_fsm_sparse				5	5	100.00
	kmac_sec_cm	69.980s	0.000us	5	5	100.00
sec_cm_ctr_redun				5	5	100.00
	kmac_sec_cm	69.980s	0.000us	5	5	100.00
sec_cm_packer_ctr_redun				5	5	100.00
	kmac_sec_cm	69.980s	0.000us	5	5	100.00
sec_cm_cfg_shadowed_config_regwen				50	50	100.00
	kmac_smoke	59.900s	0.000us	50	50	100.00
sec_cm_fsm_global_esc				50	50	100.00
	kmac_lc_escalation	37.040s	0.000us	50	50	100.00
sec_cm_fsm_local_esc				5	5	100.00
	kmac_sec_cm	69.980s	0.000us	5	5	100.00
sec_cm_absorbed_ctrl_mubi				10	10	100.00
	kmac_mubi	241.340s	0.000us	10	10	100.00
sec_cm_sw_cmd_ctrl_sparse				50	50	100.00
	kmac_smoke	59.900s	0.000us	50	50	100.00

6/10 passed

60.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				6	10	60.00
	kmac_stress_all_with_rand_reset	220.770s	0.000us	6	10	60.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (kmac_base_vseq.sv:382) [kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == *) intr_pins[KmacErr] is not set!
	kmac_key_error	104406318609927834164513221702702193951313238087511884764780480948630081355895	95	UVM_ERROR @ 1682065763 ps: (kmac_base_vseq.sv:382) [uvm_test_top.env.virtual_sequencer.kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == 1) intr_pins[KmacErr] is not set! UVM_INFO @ 1682065763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=12)
	kmac_sideload_invalid	70975663525317587457474422494847311806700733989920617990418590915844406591185	89	UVM_FATAL @ 10108376560 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xfec35000, Comparison=CompareOpEq, exp_data=0x1, call_count=12) UVM_INFO @ 10108376560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	7143108092423865568711314044531876919591394962933795425907714629505525431000	89	UVM_FATAL @ 10318410793 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe0867000, Comparison=CompareOpEq, exp_data=0x1, call_count=12) UVM_INFO @ 10318410793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	11091492123940243094096349855565530621641455352062710709455638994083872824829	91	UVM_FATAL @ 10779282351 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x561fa000, Comparison=CompareOpEq, exp_data=0x1, call_count=12) UVM_INFO @ 10779282351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:847) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [] vs [*])
	kmac_stress_all_with_rand_reset	90508107991062929298195269328761461222831965257166965862336272766322927281504	246	UVM_ERROR @ 2131383074 ps: (cip_base_vseq.sv:847) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0]) UVM_INFO @ 2131383074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=18)
	kmac_sideload_invalid	16169748998560212661673674530731509219596994599290691718190108084827200125888	96	UVM_FATAL @ 10143773188 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xee083000, Comparison=CompareOpEq, exp_data=0x1, call_count=18) UVM_INFO @ 10143773188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	29671063811265496930082109268751958875530552878863623422993166003051452858374	95	UVM_FATAL @ 10752773422 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x7583b000, Comparison=CompareOpEq, exp_data=0x1, call_count=18) UVM_INFO @ 10752773422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
	kmac_stress_all_with_rand_reset	37816181180658174024334545607211408986599824128090316140685376552843572310071	349	UVM_ERROR @ 4602601201 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. UVM_INFO @ 4602601201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	92832807631610541144994627614914426752515428809295490986249345809854388730882	119	UVM_ERROR @ 1058350574 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. UVM_INFO @ 1058350574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	103811599578489340637217951465059912315793930288995523301833172668597589743256	123	UVM_ERROR @ 10329528448 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. UVM_INFO @ 10329528448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=6)
	kmac_sideload_invalid	70503347608872519768981204258693036770847383308467716408610818190278967220105	82	UVM_FATAL @ 10074593503 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x54665000, Comparison=CompareOpEq, exp_data=0x1, call_count=6) UVM_INFO @ 10074593503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	114054662780921194097751601471624412750577858819127605068785259140161253770093	83	UVM_FATAL @ 10032725288 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x8d2b5000, Comparison=CompareOpEq, exp_data=0x1, call_count=6) UVM_INFO @ 10032725288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=10)
	kmac_sideload_invalid	3915857359051513072239851507359058946407229954849767168342959239614584936050	86	UVM_FATAL @ 10368784293 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x77f8f000, Comparison=CompareOpEq, exp_data=0x1, call_count=10) UVM_INFO @ 10368784293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=5)
	kmac_sideload_invalid	15445918105898541189437222259523978786337163020950295516862464828982380338979	81	UVM_FATAL @ 10049185129 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x28e8f000, Comparison=CompareOpEq, exp_data=0x1, call_count=5) UVM_INFO @ 10049185129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	27929827574217782790029718440668953247139544665539816707236249470140880915279	82	UVM_FATAL @ 10066151670 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3f34b000, Comparison=CompareOpEq, exp_data=0x1, call_count=5) UVM_INFO @ 10066151670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	92549706951870958880966907769652129832985975200012484598620039119181349887112	82	UVM_FATAL @ 10115426120 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x4bbb1000, Comparison=CompareOpEq, exp_data=0x1, call_count=5) UVM_INFO @ 10115426120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	39133002491145470033886566696158376059479804818765363895321082527334773138663	81	UVM_FATAL @ 10048900265 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x71459000, Comparison=CompareOpEq, exp_data=0x1, call_count=5) UVM_INFO @ 10048900265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=2)
	kmac_sideload_invalid	63261082764812159782088607808572772579799607459861397152860212290565478206482	78	UVM_FATAL @ 10011879344 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd246f000, Comparison=CompareOpEq, exp_data=0x1, call_count=2) UVM_INFO @ 10011879344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	4507072478173001127394887057245370633534423647752206142223231511783063404936	78	UVM_FATAL @ 10016874956 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb46dd000, Comparison=CompareOpEq, exp_data=0x1, call_count=2) UVM_INFO @ 10016874956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_sideload_invalid	96475696348264313211493905602829382365694961760573764369950604736079247145307	78	UVM_FATAL @ 10017905081 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd7e9f000, Comparison=CompareOpEq, exp_data=0x1, call_count=2) UVM_INFO @ 10017905081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=7)
	kmac_sideload_invalid	53329651011884726023213614018651360633134241580707968101384028022456951884769	84	UVM_FATAL @ 10884523708 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xcf0d8000, Comparison=CompareOpEq, exp_data=0x1, call_count=7) UVM_INFO @ 10884523708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=16)
	kmac_sideload_invalid	239300029563660741028806152298995974879582157874347377489107921026570516019	95	UVM_FATAL @ 10120970063 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xc7d1e000, Comparison=CompareOpEq, exp_data=0x1, call_count=16) UVM_INFO @ 10120970063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=3)
	kmac_sideload_invalid	59761445170852678795960327341626511478721502665065460364741599197576131743975	79	UVM_FATAL @ 10039176292 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xcc3fc000, Comparison=CompareOpEq, exp_data=0x1, call_count=3) UVM_INFO @ 10039176292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=15)
	kmac_sideload_invalid	83156467128912660590175258583914983476399948919238717086339068485287477227570	92	UVM_FATAL @ 10347953578 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x13a52000, Comparison=CompareOpEq, exp_data=0x1, call_count=15) UVM_INFO @ 10347953578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=14)
	kmac_sideload_invalid	15799288599030480768212142607953983714381955333566597239723423768907130332410	90	UVM_FATAL @ 10425257734 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe925f000, Comparison=CompareOpEq, exp_data=0x1, call_count=14) UVM_INFO @ 10425257734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
	kmac_error	113584754786671068783507581586030201267413462437947651180867718703189552614978	206	UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=4)
	kmac_sideload_invalid	39992313396183076935966726637496510532536464969037284778731844496536977462192	81	UVM_FATAL @ 10022908627 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3d1000, Comparison=CompareOpEq, exp_data=0x1, call_count=4) UVM_INFO @ 10022908627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=9)
	kmac_sideload_invalid	64569017587982022606158087480564910428775444174603719704583606828290522537804	85	UVM_FATAL @ 10069400993 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe2712000, Comparison=CompareOpEq, exp_data=0x1, call_count=9) UVM_INFO @ 10069400993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=, Comparison=CompareOpEq, exp_data=, call_count=17)
	kmac_sideload_invalid	98356448294686407002809585200920343415837524256763037025226016368993555325221	97	UVM_FATAL @ 10093407439 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x24007000, Comparison=CompareOpEq, exp_data=0x1, call_count=17) UVM_INFO @ 10093407439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---