TOP_DARJEELING_BATCH_SIM Simulation Results (Summary)

Tuesday June 10 2025 17:06:39 UTC

GitHub Revision: df6b01c

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
AES/UNMASKED 30 32 93.75
AES/MASKED 31 32 96.88
AON_TIMER 23 23 100.00
CSRNG 18 19 94.74
DMA 21 21 100.00
EDN 21 21 100.00
HMAC 28 28 100.00
I2C 43 50 86.00
KEYMGR 28 30 93.33
KEYMGR_DPE 14 14 100.00
KMAC/MASKED 40 40 100.00
KMAC/UNMASKED 38 40 95.00
LC_CTRL/VOLATILE_UNLOCK_DISABLED 38 39 97.44
LC_CTRL/VOLATILE_UNLOCK_ENABLED 38 39 97.44
MBX 11 14 78.57
OTBN 39 41 95.12
PRIM_ALERT 4 4 100.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 18 19 94.74
ROM_CTRL/64KB 19 19 100.00
RV_DM/USE_DMI_INTERFACE 39 53 73.58
RV_TIMER 19 19 100.00
SPI_HOST 26 26 100.00
SPI_DEVICE/1R1W 31 33 93.94
SRAM_CTRL/MAIN 30 31 96.77
SRAM_CTRL/RET 29 31 93.55
UART 25 27 92.59
AC_RANGE_CHECK 18 19 94.74
ALERT_HANDLER 22 26 84.62
CLKMGR 24 27 88.89
GPIO 27 28 96.43
OTP_CTRL 26 30 86.67
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 18 18 100.00
XBAR_PERI 18 18 100.00
XBAR_DBG 18 18 100.00
XBAR_MBX 18 18 100.00
CHIP 76 247 30.77