TOP_DARJEELING_BATCH_SIM Simulation Results (Summary)

Thursday September 18 2025 16:06:50 UTC

GitHub Revision: bddb67a

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
AES/UNMASKED 1 32 3.12
AES/MASKED 0 32 0.00
AON_TIMER 10 23 43.48
CSRNG 1 19 5.26
DMA 1 25 4.00
EDN 9 21 42.86
ENTROPY_SRC/RNG_16BITS 2 22 9.09
HMAC 27 28 96.43
I2C 41 50 82.00
KEYMGR 24 30 80.00
KEYMGR_DPE 12 14 85.71
KMAC/MASKED 35 40 87.50
KMAC/UNMASKED 23 40 57.50
LC_CTRL/VOLATILE_UNLOCK_DISABLED 37 39 94.87
LC_CTRL/VOLATILE_UNLOCK_ENABLED 33 39 84.62
MBX 0 16 0.00
OTBN 1 41 2.44
PRIM_ALERT 3 5 60.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 6 19 31.58
ROM_CTRL/64KB 17 19 89.47
RV_DM/USE_DMI_INTERFACE 39 53 73.58
RV_TIMER 17 19 89.47
SPI_HOST 2 26 7.69
SPI_DEVICE/1R1W 27 33 81.82
SRAM_CTRL/MAIN 21 31 67.74
SRAM_CTRL/RET 29 31 93.55
UART 23 27 85.19
AC_RANGE_CHECK 2 20 10.00
ALERT_HANDLER 23 26 88.46
CLKMGR 22 27 81.48
GPIO 16 28 57.14
OTP_CTRL 15 30 50.00
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 8 19 42.11
XBAR_MAIN 15 18 83.33
XBAR_PERI 16 18 88.89
XBAR_DBG 18 18 100.00
XBAR_MBX 17 18 94.44
CHIP 34 250 13.60