TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Tuesday September 16 2025 00:06:28 UTC

GitHub Revision: 996a7b4

Branch: master

Name Passing Total Pass Rate
TL_AGENT 0 50 0.00
ADC_CTRL 40 920 4.35
AES/UNMASKED 89 1602 5.56
AES/MASKED 92 1602 5.74
AON_TIMER 14 315 4.44
CSRNG 83 1630 5.09
EDN 31 1130 2.74
ENTROPY_SRC/RNG_4BITS 134 2570 5.21
HMAC 47 821 5.72
I2C 94 2042 4.60
KEYMGR 51 1110 4.59
KMAC/MASKED 0 940 0.00
KMAC/UNMASKED 0 940 0.00
LC_CTRL/VOLATILE_UNLOCK_DISABLED 50 1030 4.85
LC_CTRL/VOLATILE_UNLOCK_ENABLED 40 1030 3.88
OTBN 18 585 3.08
PATTGEN 21 570 3.68
PRIM_ALERT 0 100 0.00
PRIM_ESC 0 20 0.00
PRIM_LFSR 0 200 0.00
PRIM_PRESENT 0 50 0.00
PRIM_PRINCE 0 500 0.00
ROM_CTRL/32KB 10 266 3.76
ROM_CTRL/64KB 16 266 6.02
RV_DM/USE_JTAG_INTERFACE 16 483 3.31
RV_TIMER 8 350 2.29
SPI_HOST 51 840 6.07
SPI_DEVICE/1R1W 67 1151 5.82
SPI_DEVICE/2P 58 1151 5.04
SRAM_CTRL/MAIN 56 1190 4.71
SRAM_CTRL/RET 50 1190 4.20
SYSRST_CTRL 56 932 6.01
UART 59 1320 4.47
USBDEV 186 3970 4.69
GPIO 43 1020 4.22
ALERT_HANDLER 38 850 4.47
CLKMGR 0 960 0.00
FLASH_CTRL 55 1281 4.29
OTP_CTRL 0 1343 0.00
PWM 3 276 1.09
PWRMGR 22 1070 2.06
RSTMGR_CNSTY_CHK 1 10 10.00
RSTMGR 29 620 4.68
XBAR_MAIN 0 900 0.00
XBAR_PERI 0 900 0.00
CHIP 35 2955 1.18