TOP_DARJEELING_BATCH_SIM Simulation Results (Summary)

Wednesday October 15 2025 16:08:40 UTC

GitHub Revision: 0fc384d

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
AES/UNMASKED 30 32 93.75
AES/MASKED 30 32 93.75
AON_TIMER 23 23 100.00
CSRNG 19 19 100.00
DMA 24 25 96.00
EDN 20 21 95.24
ENTROPY_SRC/RNG_16BITS 22 22 100.00
HMAC 28 28 100.00
I2C 42 50 84.00
KEYMGR 30 30 100.00
KEYMGR_DPE 14 14 100.00
KMAC/MASKED 38 40 95.00
KMAC/UNMASKED 40 40 100.00
LC_CTRL/VOLATILE_UNLOCK_DISABLED 38 39 97.44
LC_CTRL/VOLATILE_UNLOCK_ENABLED 39 39 100.00
MBX 14 16 87.50
OTBN 19 41 46.34
PRIM_ALERT 4 5 80.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 19 19 100.00
ROM_CTRL/64KB 18 19 94.74
RV_DM/USE_DMI_INTERFACE 40 53 75.47
RV_TIMER 16 19 84.21
SPI_HOST 25 26 96.15
SPI_DEVICE/1R1W 31 33 93.94
SRAM_CTRL/MAIN 29 31 93.55
SRAM_CTRL/RET 29 31 93.55
UART 26 27 96.30
AC_RANGE_CHECK 19 20 95.00
ALERT_HANDLER 25 26 96.15
CLKMGR 25 27 92.59
GPIO 25 28 89.29
OTP_CTRL 20 30 66.67
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 18 18 100.00
XBAR_PERI 18 18 100.00
XBAR_DBG 18 18 100.00
XBAR_MBX 18 18 100.00
CHIP 77 250 30.80