TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Thursday October 23 2025 19:26:26 UTC

GitHub Revision: ea78273

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
ADC_CTRL 24 25 96.00
AES/UNMASKED 30 32 93.75
AES/MASKED 31 32 96.88
AON_TIMER 23 23 100.00
CSRNG 19 19 100.00
EDN 21 21 100.00
ENTROPY_SRC/RNG_4BITS 22 22 100.00
HMAC 28 28 100.00
I2C 40 50 80.00
KEYMGR 30 30 100.00
KMAC/MASKED 40 40 100.00
KMAC/UNMASKED 39 40 97.50
LC_CTRL/VOLATILE_UNLOCK_DISABLED 35 39 89.74
LC_CTRL/VOLATILE_UNLOCK_ENABLED 33 39 84.62
OTBN 20 41 48.78
PATTGEN 17 18 94.44
PRIM_ALERT 5 5 100.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 18 19 94.74
ROM_CTRL/64KB 18 19 94.74
RV_DM/USE_JTAG_INTERFACE 43 53 81.13
RV_TIMER 16 19 84.21
SPI_HOST 26 26 100.00
SPI_DEVICE/1R1W 31 33 93.94
SPI_DEVICE/2P 33 33 100.00
SRAM_CTRL/MAIN 30 31 96.77
SRAM_CTRL/RET 30 31 96.77
SYSRST_CTRL 27 27 100.00
UART 27 27 100.00
USBDEV 97 100 97.00
GPIO 26 27 96.30
ALERT_HANDLER 25 26 96.15
CLKMGR 26 27 96.30
FLASH_CTRL 56 78 71.79
OTP_CTRL 28 30 93.33
PWM 8 17 47.06
PWRMGR 25 28 89.29
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 18 18 100.00
XBAR_PERI 18 18 100.00
CHIP 277 326 84.97