TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Friday January 24 2025 17:10:00 UTC

GitHub Revision: 002bb67a7c

Branch: master

Name Passing Total Pass Rate Coverage
TL_AGENT 50 50 100.00 --
ADC_CTRL 896 920 97.39 97.62
AES/UNMASKED 1529 1602 95.44 97.13
AES/MASKED 1531 1602 95.57 98.36
AON_TIMER 476 480 99.17 97.99
CSRNG 1618 1630 99.26 97.69
EDN 1109 1130 98.14 95.54
ENTROPY_SRC 2074 2570 80.70 97.14
GPIO 940 970 96.91 98.41
HMAC 710 710 100.00 98.05
I2C 1833 2042 89.76 91.04
KEYMGR 1022 1110 92.07 97.73
KMAC/MASKED 903 940 96.06 95.34
KMAC/UNMASKED 892 940 94.89 93.89
LC_CTRL/VOLATILE_UNLOCK_DISABLED 1006 1030 97.67 90.31
LC_CTRL/VOLATILE_UNLOCK_ENABLED 1005 1030 97.57 90.27
OTBN 571 585 97.61 99.06
PATTGEN 515 570 90.35 98.96
PRIM_ALERT 76 80 95.00 95.19
PRIM_ESC 20 20 100.00 92.29
PRIM_LFSR 200 200 100.00 98.31
PRIM_PRESENT 50 50 100.00 93.41
PRIM_PRINCE 500 500 100.00 100.00
PWM 257 276 93.12 99.02
ROM_CTRL/32KB 449 460 97.61 99.51
ROM_CTRL/64KB 459 460 99.78 99.46
RV_DM/USE_JTAG_INTERFACE 421 483 87.16 76.35
RV_TIMER 577 620 93.06 99.66
SPI_HOST 827 840 98.45 97.01
SPI_DEVICE/1R1W 1127 1151 97.91 95.44
SPI_DEVICE/2P 1150 1151 99.91 95.48
SRAM_CTRL/MAIN 1189 1190 99.92 99.24
SRAM_CTRL/RET 1189 1190 99.92 99.24
SYSRST_CTRL 900 932 96.57 97.38
UART 1315 1320 99.62 98.76
USBDEV 3905 3965 98.49 97.63
ALERT_HANDLER 801 850 94.24 99.22
CLKMGR 910 960 94.79 98.40
FLASH_CTRL 1249 1281 97.50 95.03
OTP_CTRL 1196 1343 89.05 94.22
PWRMGR 961 1120 85.80 97.98
RSTMGR_CNSTY_CHK 10 10 100.00 95.87
RSTMGR 618 620 99.68 99.47
XBAR_MAIN 900 900 100.00 99.21
XBAR_PERI 900 900 100.00 99.30
CHIP 2855 2955 96.62 95.72