TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Tuesday April 08 2025 20:27:51 UTC

GitHub Revision: 6f17fda

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
ADC_CTRL 23 25 92.00
AES/UNMASKED 31 32 96.88
AES/MASKED 31 32 96.88
AON_TIMER 23 23 100.00
CSRNG 18 19 94.74
EDN 21 21 100.00
ENTROPY_SRC 17 22 77.27
HMAC 28 28 100.00
I2C 46 50 92.00
KEYMGR 26 30 86.67
KMAC/MASKED 38 40 95.00
KMAC/UNMASKED 38 40 95.00
LC_CTRL/VOLATILE_UNLOCK_DISABLED 39 39 100.00
LC_CTRL/VOLATILE_UNLOCK_ENABLED 39 39 100.00
OTBN 39 41 95.12
PATTGEN 16 18 88.89
PRIM_ALERT 4 4 100.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 19 19 100.00
ROM_CTRL/64KB 19 19 100.00
RV_DM/USE_JTAG_INTERFACE 46 53 86.79
RV_TIMER 14 16 87.50
SPI_HOST 25 26 96.15
SPI_DEVICE/1R1W 31 33 93.94
SPI_DEVICE/2P 32 33 96.97
SRAM_CTRL/MAIN 30 31 96.77
SRAM_CTRL/RET 29 31 93.55
SYSRST_CTRL 27 27 100.00
UART 27 27 100.00
USBDEV 97 99 97.98
GPIO 26 27 96.30
ALERT_HANDLER 21 26 80.77
CLKMGR 26 27 96.30
FLASH_CTRL 61 78 78.21
OTP_CTRL 26 30 86.67
PWM 8 17 47.06
PWRMGR 27 28 96.43
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 18 18 100.00
XBAR_PERI 18 18 100.00
CHIP 285 325 87.69