TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Thursday April 10 2025 20:14:43 UTC

GitHub Revision: 66485ba

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
ADC_CTRL 24 25 96.00
AES/UNMASKED 30 32 93.75
AES/MASKED 31 32 96.88
AON_TIMER 23 23 100.00
CSRNG 17 19 89.47
EDN 21 21 100.00
ENTROPY_SRC 19 22 86.36
HMAC 28 28 100.00
I2C 46 50 92.00
KEYMGR 28 30 93.33
KMAC/MASKED 39 40 97.50
KMAC/UNMASKED 37 40 92.50
LC_CTRL/VOLATILE_UNLOCK_DISABLED 38 39 97.44
LC_CTRL/VOLATILE_UNLOCK_ENABLED 38 39 97.44
OTBN 39 41 95.12
PATTGEN 17 18 94.44
PRIM_ALERT 4 4 100.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 18 19 94.74
ROM_CTRL/64KB 19 19 100.00
RV_DM/USE_JTAG_INTERFACE 47 53 88.68
RV_TIMER 15 16 93.75
SPI_HOST 26 26 100.00
SPI_DEVICE/1R1W 31 33 93.94
SPI_DEVICE/2P 32 33 96.97
SRAM_CTRL/MAIN 30 31 96.77
SRAM_CTRL/RET 29 31 93.55
SYSRST_CTRL 26 27 96.30
UART 27 27 100.00
USBDEV 96 99 96.97
GPIO 26 27 96.30
ALERT_HANDLER 22 26 84.62
CLKMGR 26 27 96.30
FLASH_CTRL 62 78 79.49
OTP_CTRL 27 30 90.00
PWM 8 17 47.06
PWRMGR 28 28 100.00
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 18 18 100.00
XBAR_PERI 18 18 100.00
CHIP 283 325 87.08